Process Engineer – Semiconductor Heterogeneous Integration

Keysight Technologies, Inc.•Santa Rosa, CA

11d•Onsite

About The Position

Keysight is a leader in technology innovation, providing solutions in electronic design, simulation, prototyping, test, manufacturing, and optimization across various industries including communications, 5G, automotive, energy, quantum, aerospace, defense, and semiconductor markets. With approximately 15,000 employees, Keysight serves customers in over 100 countries. The company fosters an award-winning culture that encourages creativity, innovation, and belonging, enabling employees to thrive in their careers. This role focuses on driving the development and industrialization of advanced packaging technologies for next-generation System-in-Package (SiP) modules, particularly those integrated with microwave and mmWave subsystems. The position is crucial for serving multiple industries such as wireless communications, aerospace, and automotive. It sits at the intersection of design development and process innovation, with a significant emphasis on heterogeneous integration – the process of combining diverse semiconductor technologies into a single, high-performance package. This role is distinct from an Advanced Packaging role, which concentrates on manufacturing execution and process development, though both roles collaborate closely within the same team.

Requirements

B.S., M.S., or Ph.D. in Materials Science, Mechanical Engineering, Chemical Engineering, Electrical Engineering, or related field
3+ years of applicable semiconductor manufacturing industry experience (applicable internship/lab work/research experience will be considered)
Strong analytical and problem-solving skills
Ability to collaborate effectively across design, process, and manufacturing teams
Excellent communication skills for technical discussions and cross-functional alignment
Candidates must be a U.S. citizen or lawful permanent resident of the U.S., or protected individual, having authorization from the U.S. government for export-controlled items.

Nice To Haves

Semiconductor packaging design and integration
Design for manufacturing and reliability
Advanced interconnect technologies (flip-chip, thermocompression bonding)
Materials science for packaging applications
Statistical analysis and design of experiments (DOE)
Familiarity with SiP (System in Package), SMT, and heterogeneous integration
Local to Santa Rosa, CA or willing to relocate

Responsibilities

Collaborate with design teams to define packaging architectures and integration strategies.
Develop design rules and guidelines for manufacturability and reliability.
Evaluate new materials, interconnect technologies, and advanced packaging concepts.
Perform feasibility studies and risk assessments for new designs.
Partner with process and integration engineering and manufacturing teams to ensure smooth technology transfer.
Support prototype builds and analyze performance data to refine design approaches.
Drive innovation and lead projects in heterogeneous integration and advanced packaging for emerging markets like 6G.
Drive technical and business process optimizations to meet Key Performance Indicators (KPI) targets and metrics.
Manage multiple priorities, assess risks and tradeoffs, and propose and implement solutions to mitigate risks.
Regularly report progress and risks to cross-functional partners and upper management.