Principal Mixed-Signal IC Design Engineer
About The Position
MaxLinear is seeking a Principal Mixed-Signal IC Design Engineer to join its Analog Mixed-Signal (AMS) group. The role serves as a technical lead for mixed-signal SoC products across the interface and connectivity portfolio, leading products from specification through production. The position includes ownership of mixed-signal architecture and top-level design, development and integration of high-speed interface and PHY IP, design of analog and clocking circuits, and top-level chip integration and verification. The engineer also leads post-silicon bring-up and characterization, supports qualification and production ramp, and mentors designers. The role requires a proven history of leading mixed-signal IC products through successful tapeouts and production, along with substantial relevant experience and technical leadership.
Requirements
- Proven track record leading mixed-signal IC products from specification to production, with multiple successful tapeouts in advanced CMOS processes.
- Strong expertise in mixed-signal and analog IC design, including making architectural trade-offs across analog, digital, and system boundaries.
- Good understanding of analog layout, device matching, parasitics, and process and reliability effects in deep-submicron CMOS.
- Hands-on lab bring-up and characterization experience using oscilloscopes, phase-noise/jitter analyzers, and protocol analyzers.
- Demonstrated technical leadership and mentoring ability, with strong written and verbal communication skills.
- BS in Electrical Engineering or a related field plus 9 years of experience, or MS plus 7 years of experience, or Ph.D. plus 4 years of experience.
Nice To Haves
- Experience with PLLs, DLLs, oscillators, and clock distribution, including jitter and phase-noise analysis.
- Experience designing and integrating high-speed serial interfaces and PHYs, such as PCIe, USB, Ethernet, MIPI, or other SerDes-based standards, including TX/RX, equalization, and CDR circuits.
- Experience with interface and connectivity SoCs with embedded controllers and related standards compliance testing.
- Experience with analog building blocks such as LDOs, bandgap references, POR, comparators, and oscillators.
- Experience with I/O and ESD protection schemes, latch-up, and signal and power integrity considerations.
- Experience with mixed-signal verification methodology, including Verilog-A/Verilog-AMS behavioral modeling.
Responsibilities
- Own mixed-signal architecture and top-level design of complex SoCs from product definition and specification through tapeout, qualification, and production release.
- Lead in-house development and/or third-party integration of high-speed interface and PHY IP, including architecture definition, IP selection, vendor evaluation, PHY-to-controller interfacing, and top-level analog/digital partitioning.
- Design and supervise high-speed analog front-end circuits, including transmit drivers, receivers, equalizers, clock and data recovery (CDR), and serializer/deserializer circuits.
- Lead design of clock generation and distribution circuits, including PLLs, oscillators, and clock drivers, to meet system-level jitter and phase-noise requirements.
- Design and supervise supporting analog blocks, including LDOs, bandgap references, POR/reset generation, bias circuits, comparators, and I/O and ESD structures.
- Drive top-level chip integration, power and clock planning, floorplanning, pad ring, and package co-design with layout, digital, and package teams.
- Define and review mixed-signal verification strategy with digital verification teams, including behavioral models, AMS co-simulation, and top-level checks.
- Drive IP make/reuse/buy decisions and provide technical input on schedule, effort, and resource planning for new product programs.
- Mentor and guide senior and junior designers, conduct design reviews, and provide updates through documentation and presentations.
- Lead post-silicon bring-up, debug, and characterization, and support test, product, applications, and operations teams through qualification and production ramp.
- Implement design methodologies that meet company and industry standards for product reliability, yield, and industry-standard compliance.
Benefits
- Health care benefits
- 401k savings plan
- Employee Stock Purchase Plan (ESPP)
- Paid time off
- Annual discretionary bonus eligibility
- Stock-based compensation may be included for many positions
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What This Job Offers
Job Type
Full-time
Career Level
Principal
