About The Position

Develops digital designs for power management ICs, working across design, verification, debug, simulation, and automation scripting. The role includes managing assigned design blocks from requirements through architecture and implementation, contributing to pre- and post-silicon work, and serving as the functional digital design lead on projects. It also involves researching and presenting tools that can improve the design-development process and mentoring junior engineers. The position is described as a full-time, permanent technical leadership role on a collaborative team developing digital power management ICs. Renesas is an embedded semiconductor solution provider with a global team of more than 21,000 engineers and problem solvers in over 30 countries. Its culture is described by the values Transparent, Agile, Global, Innovative, and Entrepreneurial. The company offers a competitive benefits package alongside salary; further details are provided during hiring.

Requirements

  • BSc or MSc in Electrical Engineering or Computer Engineering (EE/ECE).
  • At least 10 years of relevant industry experience.
  • Prior design-project experience demonstrating collaborative and innovative thinking.
  • Proficiency in developing CDC-, RDC-, and LINT-clean designs in Verilog.
  • Comfort debugging mixed-signal designs in SystemVerilog-based test benches.
  • Exposure to gate-level simulation debug.
  • Experience designing industry-standard serial interfaces such as I2C, I3C, SPI, or I2S.
  • Strong analytical skills and debug methodology.
  • Good written and verbal communication skills.
  • Working experience with Cadence or Synopsys design-tool flows.
  • Hands-on technical leadership experience resulting in successful projects.

Nice To Haves

  • Proficiency in scripting languages such as Python or Perl.
  • Knowledge of ARM Cortex-M-series processors and computer architecture generally.
  • Exposure to mixed-signal designs and a basic understanding of analog circuits.
  • Experience with digital backend design flows, including synthesis, STA, and P&R.
  • Full design-flow experience, including specification, micro-architecture, RTL implementation, and backend implementation.
  • Experience with PMBus/SMBus, AVSBus, SVID, or SVI3.

Responsibilities

  • Develop, debug, and verify digital designs in pre- and post-silicon environments.
  • Write tests to verify design intent against specifications.
  • Develop and improve scripts that facilitate design automation flows.
  • Manage assigned design blocks across requirements, architecture, and implementation.
  • Research and present tools that support the design-development process.
  • Mentor junior engineers in a technical capacity.
  • Represent digital design as the functional digital design lead in design projects.

Benefits

  • Competitive benefits package alongside salary; further details will be provided during the hiring process.
© 2026 Teal Labs, Inc
Privacy PolicyTerms of Service