Principal IC Design Engineer - Analog

Medtronic•Tempe, MN
•Onsite

About The Position

Medtronic is seeking a Principal IC Design Engineer - Analog to help lead the development of next-generation Cardiac Rhythm Management (CRM) devices. The role is part of an integrated Mixed-Signal ASIC team that develops technology for cardiac pacing, defibrillation, and monitoring therapies. The team’s work supports implantable cardiac devices and connects circuit design to patient outcomes. The engineer will contribute as an individual designer and coach peer and less-experienced teammates. The role spans requirements definition, design exploration and implementation, simulation, circuit evaluation and verification, physical design, lab testing and characterization, formal verification, production test, and other activities across the development cycle. The position is based in Mounds View, Minnesota, or Tempe, Arizona, and requires working onsite at least four days per week. The position involves specifying and designing analog and mixed-signal integrated circuits, defining circuit innovation and design direction, and owning designs from concept through production release. The engineer will use Cadence EDA tools, Spectre, and ADE for design and verification; integrate test strategies and designs into chip-level mixed-signal simulations; direct layout; analyze extracted parasitics; and characterize and verify ICs and electronic modules using laboratory equipment and automation tools such as LabView and Python. The role also includes design reviews, cross-functional collaboration, and evaluating EDA vendor offerings to improve processes. The minimum qualification is a bachelor’s degree in Electrical or Electronic Engineering or a related field with at least seven years of analog and mixed-signal IC design experience; alternatively, at least five years with an advanced degree, or at least three years with a PhD. The role offers a U.S. base salary range of $140,000–$210,000 and eligibility for the short-term Medtronic Incentive Plan. Benefits described for eligible regular employees include health and insurance coverage, retirement plans, paid time off, paid holidays, tuition assistance or reimbursement, employee stock purchase, and well-being resources, subject to the eligibility conditions in the posting.

Requirements

  • Bachelor’s degree in Electrical or Electronic Engineering or a related field and at least 7 years of experience designing analog and mixed-signal integrated circuits; alternatively, at least 5 years of such experience with an advanced degree, or at least 3 years with a PhD.
  • Ability to specify, develop, and design analog and mixed-signal integrated circuits.
  • Ability to work across the design and development cycle, including requirements, simulation, verification, layout, characterization, and production release.

Nice To Haves

  • Master’s degree in Electrical or Electronics Engineering.
  • Experience using Cadence EDA analog and mixed-signal tools.
  • Thorough knowledge of analog and mixed-signal IC design methodologies.
  • Demonstrated experience navigating the multi-variable tradeoffs typical of analog designs and coaching others in these considerations.
  • Experience with ultra-low-power and subthreshold design methodologies.
  • Thorough knowledge of semiconductor materials, devices, and fabrication.
  • Experience with high-voltage and switch-mode power electronic devices and applications.
  • Expertise with Cadence analog design tools.
  • Expertise with quality and statistical methods.
  • Medical device experience.

Responsibilities

  • Specify, develop, and design analog and mixed-signal integrated circuits as an individual contributor and coach peer and less-experienced teammates.
  • Define circuit innovation and design direction by gathering and reducing requirements from product, project, systems, test, research, and firmware engineering.
  • Foster communication and collaboration across the team and supporting departments.
  • Own designs throughout the development cycle, from concept through release to production.
  • Create schematics and verification simulations using Cadence EDA tools.
  • Develop and maintain Spectre and ADE simulation testbenches to verify functionality and performance against specifications across PVT variations.
  • Integrate test strategies into designs for testability, including built-in self-test architectures.
  • Integrate designs into mixed-signal and AMS modeling simulations supporting chip-level verification.
  • Translate circuit requirements into layout directions addressing signal integrity, matching, thermal considerations, and related needs.
  • Direct and review IC layout activities using Cadence Layout tools.
  • Create physical-design parasitic extractions and perform impact analysis.
  • Specify, direct, and perform design characterization and verification of ICs and electronic modules.
  • Develop, configure, and run characterization tests using test and measurement equipment and lab tools, including LabView and Python automation.
  • Conduct concept, preliminary, critical, and fracture reviews to ensure device quality, capability, and functional requirements.
  • Review EDA tool vendor offerings to identify improvements to existing processes or methods.

Benefits

  • Competitive salary and flexible benefits package.
  • Short-term incentive through the Medtronic Incentive Plan (MIP).
  • Health insurance.
  • Dental insurance.
  • Vision insurance.
  • Health Savings Account.
  • Healthcare Flexible Spending Account.
  • Life insurance.
  • Long-term disability leave.
  • Dependent daycare spending account.
  • Tuition assistance or reimbursement.
  • Simple Steps global well-being program.
  • Incentive plans.
  • 401(k) plan with employer contribution and match.
  • Short-term disability.
  • Paid time off.
  • Paid holidays.
  • Employee Stock Purchase Plan.
  • Employee Assistance Program.
  • Non-qualified Retirement Plan Supplement, subject to IRS earning minimums.
  • Capital Accumulation Plan, available to Vice Presidents and above or subject to IRS earning minimums.
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