Principal Analog Design Engineer

Micron•Richardson, TX

About The Position

Micron Technology is seeking a Principal Analog Design Engineer to lead the design, integration, and delivery of advanced analog and mixed-signal IPs for High Bandwidth Memory (HBM) products. The role develops and integrates high-performance analog subsystems within the HBM logic die to enable bandwidth, power efficiency, and reliability. The engineer provides technical leadership across analog design, IP integration, system alignment, and silicon execution, driving end-to-end success of HBM solutions. The role includes designing critical HBM analog circuits; defining subsystem interfaces, power domains, clocking schemes, and reset strategies; conducting pre- and post-layout simulations and reliability analyses; partnering with layout engineers on floorplanning and layout requirements; reviewing and signing off analog layouts; optimizing layout-aware builds for advanced nodes; and establishing guidelines for analog build, documentation, and reuse. The engineer collaborates with analog, digital, system, packaging, and test teams.

Requirements

  • MS or PhD in Electrical Engineering or a related field.
  • Approximately 10–15+ years of experience in analog/mixed-signal IC build.
  • Proven expertise in high-speed interface design, clocking circuits (PLL/DLL/CDR), and power management circuits.
  • Strong experience with analog IP integration at the subsystem or SoC level; SPICE simulation, extraction, and modeling; and silicon bring-up and lab validation.
  • Deep understanding of advanced CMOS processes and noise, jitter, signal integrity/power integrity (SI/PI), and cross-domain coupling effects.

Nice To Haves

  • Deep knowledge of DRAM subsystem architecture, specification, operation, or build.
  • Understanding of physical layout and circuit floor planning.
  • Excellent problem-solving and analytical skills.

Responsibilities

  • Lead the design and own critical HBM analog circuits, including high-speed transmitters and receivers; clock generation and distribution circuits (PLLs, DLLs, and CDRs); SerDes-related analog blocks; biasing, reference, and calibration circuits; and power delivery and regulation circuits such as LDOs and regulators.
  • Define and lead IP interfaces, power domains, clocking schemes, and reset strategies across subsystems.
  • Conduct detailed pre-layout and post-layout simulations.
  • Conduct PVT, Monte Carlo, mismatch, and aging analyses.
  • Work with layout engineers to define floorplanning and symmetry requirements and ensure matching, shielding, and EM/IR compliance.
  • Review and sign off on analog layouts.
  • Drive layout-aware build optimizations for advanced nodes.
  • Define guidelines for analog build, documentation, and reuse.
  • Collaborate across analog, digital, system, packaging, and test teams.
  • Lead analog design, IP integration, system alignment, and silicon execution for HBM solutions.

Benefits

  • Choice of medical, dental, and vision plans.
  • Programs to help protect income in the event of illness or injury.
  • Paid family leave.
  • Paid time off.
  • Paid holidays.
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