Principal Engineer, SoC Architecture

kepler • San Jose, CA

1d • $250,000 - $310,000

About The Position

Kepler is seeking a highly experienced SoC Architecture Lead to own architecture for its products. This high-visibility role spans memory architecture, SoC architecture, system design, and AI workload optimization, with the goal of delivering silicon that improves compute per watt for AI.

The role defines product architecture and models system performance and power ahead of RTL implementation, while coordinating implementation across design, physical design, packaging, software, verification, and other teams. It also engages customers in product definition and system-level reviews, establishes architecture practices, and leads and mentors architecture engineers.

Requirements

• B.Tech, M.Tech, MS, or PhD in EE, ECE, Computer Engineering, or a related field.
• 15–20 years of hands-on experience in SoC design, VLSI, and systems architecture, with multiple successful tapeouts.
• Deep expertise in SoC architecture, micro-architecture definition, and high-level modeling.
• Strong experience with VLSI front-end design flows, including RTL, synthesis, timing, and their interaction with physical design.
• Solid understanding of AI workloads, compute and memory access patterns, and their hardware implications.
• Experience with memory architecture and integration.
• Proven experience with high-performance, low-power VLSI methods.
• Solid knowledge of physical design, packaging, and DFT/DFD principles.
• Experience with 3D innovations.
• Experience with system design, validation, deployment, and customer engagement.
• Strong background in modeling with C/C++ and SystemC/TLM.
• Excellent leadership, communication, and presentation skills.
• Proven record from architecture definition through production release.

Nice To Haves

• Understanding of memory bandwidth and compute enhancement for memory base die.
• Prior startup experience with lean teams and aggressive timelines.

Responsibilities

• Own architecture definition for Kepler’s products, including platform architecture, micro-architecture, IP selection, and KPI/PPA validation.
• Define architectures that improve memory bandwidth, capacity, and energy efficiency for AI workloads.
• Develop high-level architectural models to evaluate PPA targets and system throughput before RTL implementation.
• Define IP integration specifications and align design and physical design teams on interfaces and timing.
• Drive system-level integration with packaging and 3D innovation teams.
• Coordinate with RTL, software, verification, physical design, packaging, and DFX teams to ensure architectural decisions are implementable.
• Engage with customers on product definition and system-level reviews.
• Build and maintain performance and power estimation models and system-level simulators.
• Set architecture best practices, review processes, and documentation standards.
• Build, lead, and mentor a team of architecture engineers.
• Represent the architecture team in customer, partner, and executive reviews.

Benefits

• Medical coverage
• Dental coverage
• Vision coverage
• Retirement benefits
• Time off
• Additional Kepler benefits, as applicable; eligibility and offerings may vary based on employment status and work location.

What This Job Offers

• Job Type: Full-time
• Career Level: Principal
• Education Level: Ph.D. or professional degree