Principal Engineer, Mixed-Signal Design Engineering

Analog Devices•Wilmington, MA

20h•$157,080 - $227,460

About The Position

Analog Devices’ Industrial Architecture Team in Somerset, New Jersey, is seeking an experienced Principal Mixed-Signal Design Engineer with high-speed, fine-line mixed-signal CMOS experience to develop IC architectures for new products. The engineer will be a key member of an advanced architecture team, helping extend the high-performance Industrial portfolio into new, more highly integrated market segments. The role involves system-level design for monolithic and heterogeneously integrated systems using fine-line CMOS and other process technologies, in close collaboration with an experienced development team. A demonstrated record of driving industry-leading performance and innovation through patents, peer-reviewed publications, or product leadership is required. The role focuses on clock generation and distribution for mixed-signal ICs used in pin electronic testing, including PLLs, multi-GHz clock distribution, multi-chip synchronization, phase interpolators, and circuits for measuring and correcting timing errors. The engineer will also assist with receive-path architecture development, including subblock specifications for components such as CTLEs, PGAs, and A/D converters. The position is an experienced, first-shift/day role with 10% required travel. The expected wage range is $157,080 to $227,460, with a discretionary performance-based bonus. Benefits include medical, vision and dental coverage, 401(k), paid vacation, holidays, sick time, and other benefits.

Requirements

PhD required.
5–10 years of experience in analog design and design integration.
Experience as an analog/RF designer in CMOS IC design, including multiple tapeouts.
Good understanding of analog/RF circuits and systems, communication theory with emphasis on wired-link equalization, MOS device modeling and operation, signal integrity, and SerDes.
Extensive experience in PCB design, troubleshooting, and RF measurements.
Demonstrated track record of driving industry-leading performance and innovation, as evidenced by patents, peer-reviewed publications, and/or industry-leading product leadership.
Strong technical, analytical, and communication skills.

Nice To Haves

Tapeouts in FinFET technology.
Strong problem-solving abilities and attention to detail.
Ability to work collaboratively in a team environment.
Proactive and self-motivated approach with a passion for innovation.

Responsibilities

Lead architecture for clock generation and distribution in an advanced mixed-signal IC for pin electronic testing.
Design, integrate, and debug PLLs.
Develop multi-GHz clock distribution.
Develop multi-chip synchronization.
Develop phase interpolators.
Develop circuits for measuring and correcting timing errors.
Assist in receive-path architecture development, including subblock specifications that may include CTLE, PGA, and A/D converter.