Principal Analog Mixed-Signal Design Engineer

SiTime Corporation•Santa Clara, CA

5d•$148,320 - $203,940

About The Position

SiTime is seeking a Principal Analog Mixed-Signal Design Engineer to lead development of analog and mixed-signal ICs and own top-level design. The role develops architectures and circuits in CMOS or BiCMOS processes, evaluates technology, architecture, circuit, and parametric trade-offs, and performs transistor-level design and simulation. It also oversees block designers and layout work, leads design reviews, and partners with cross-functional teams on DFT, verification, bench validation, qualification, final test development, silicon bring-up, and production release. The engineer owns the top-level schematic and analog simulations, works with verification teams to define the verification matrix, and participates in top-level AMS verification. The position requires experience taking an analog-mixed-signal product through high-volume production and working effectively with geographically dispersed teams. SiTime describes itself as the Precision Timing company, developing MEMS-based programmable timing solutions used across applications including AI datacenters, automated driving, industrial and humanoid robots, wearables, and IoT. The company reports shipping more than 4 billion devices. The compensation package includes base salary, eligibility for a quarterly bonus tied to innovation goals, equity grants, and benefits.

Requirements

M.Sc. in Electrical Engineering with at least 10 years of relevant experience, or Ph.D. in Electrical Engineering with at least 6 years of relevant experience.
Track record of taking at least one analog-mixed-signal part to high-volume production.
Experience with circuit architecture development and technical feasibility studies.
Experience writing detailed block-level specifications and review documents.
Detailed design and simulation experience with one or more of the following: oscillators, ADCs, DACs, temperature sensors, integer and fractional-N PLLs, digital PLLs, low-noise op-amps, regulators, bandgap circuits, or subthreshold circuits and architectures in CMOS or BiCMOS processes.
Proficiency with EDA tools including Cadence Virtuoso, Spectre, ADE, mixed-mode AMS tools, and Layout XL.
Extensive knowledge of layout effects for circuit and layout design, and ability to supervise layout designers.
Extensive experience with post-layout extraction and verification.
Experience with validation, characterization, qualification, and production-release criteria.
Ability to communicate and work effectively with geographically dispersed mixed-signal, digital, and verification engineering teams.
Ability to work independently and drive solutions to challenging problems.

Nice To Haves

Strong team player.

Responsibilities

Lead development of analog and mixed-signal ICs and own the top-level design.
Supervise and review block designers’ work and conduct design reviews.
Work with cross-functional teams to architect the chip for DFT.
Support cross-functional teams with bench validation, qualification, and final test development.
Develop analog and mixed-signal architectures and circuits in CMOS or BiCMOS processes.
Analyze technology, architecture, circuit-design, and parametric trade-offs to meet technical performance specifications.
Perform transistor-level design and simulation using EDA tools.
Supervise analog circuit physical-design layout and edit layouts.
Collaborate with digital design, CAD, systems engineering, test engineering, and applications teams on DFT and DFM features, silicon bring-up, and production release.
Work with the verification team to define the verification matrix.
Own the top-level schematic and run top-level analog simulations.
Participate in top-level AMS verification.