Principal Engineer, Mixed-Signal Design Engineering

Analog Devices•Wilmington, MA

About The Position

Analog Devices’ Industrial Architecture Team in Somerset, New Jersey, is seeking an experienced Principal Mixed-Signal Design Engineer with high-speed, fine-line mixed-signal CMOS experience to develop IC architectures for new products. The engineer will be a key member of an advanced architecture team, helping extend the company’s high-performance Industrial portfolio into new and more highly integrated market segments. The role involves developing system-level designs for monolithic and heterogeneously integrated systems using fine-line CMOS and other process technologies, in close collaboration with the development team. The successful candidate will demonstrate a record of driving industry-leading performance and innovation through patents, peer-reviewed publications, and/or product leadership. The role leads clock-generation and distribution architecture for advanced mixed-signal ICs used in pin electronic testing and contributes to receive-path architecture development. The position is based with the team in Somerset, NJ; the posting specifies first-shift/day work and 10% travel. The expected wage range for a new hire is $157,080 to $227,460. Actual pay may vary based on work location, experience, education, training, market data, internal pay equity, and other bona fide factors. The position qualifies for a discretionary performance-based bonus based on personal and company factors. Benefits include medical, vision, and dental coverage, a 401(k), paid vacation, holidays, sick time, and other benefits. Positions requiring access to technical data may require export licensing review for certain applicants.

Requirements

PhD required.
5–10 years of experience in analog design and design integration.
Experience as an analog/RF designer in CMOS IC design, with multiple tapeouts.
Good understanding of analog/RF circuits and systems.
Knowledge of communication theory, particularly equalization of a wired link.
Knowledge of MOS device modeling and operation.
Knowledge of signal integrity and SerDes.
Extensive experience in PCB design, troubleshooting, and RF measurements.
Demonstrated record of driving industry-leading performance and innovation, as shown through patents, peer-reviewed publications, and/or industry-leading product leadership.
Strong technical, analytical, and communication skills.

Nice To Haves

Tapeouts in FinFET technology.
Strong problem-solving abilities and attention to detail.
Ability to work collaboratively in a team environment.
Proactive and self-motivated approach, with a passion for innovation.

Responsibilities

Lead clock-generation and distribution architecture for advanced mixed-signal ICs for pin electronic testing.
Design, integrate, and debug PLLs.
Develop multi-GHz clock distribution.
Develop multi-chip synchronization.
Develop phase interpolators.
Develop circuits for measuring and correcting timing errors.
Assist in receive-path architecture development, including subblock specifications that may cover CTLE, PGA, and A/D converter blocks.