Astera Labs is seeking Principal Design Engineers to develop micro-architecture and implement front-end circuit design for high-performance network controllers. The work includes RTL, synthesis, IP integration, and block-level verification. Candidates should have knowledge of communication and interface protocols such as PCI Express (Gen 3 and above), UALink, ESUN, and Ethernet. The role involves owning full-chip or block-level designs from architecture through GDS and driving complex designs into production. Engineers will work with digital design tools and flows, contribute to design-for-test and verification activities, and support silicon bring-up and debug. The position requires a professional, customer-minded approach, the ability to manage multiple priorities with minimal supervision, and an entrepreneurial, can-do attitude. Applicants must be authorized to work in the United States and able to start immediately.
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Job Type
Full-time
Career Level
Principal