Astera Labs is seeking Principal Design Engineers to develop micro-architecture and implement front-end circuit design for high-performance network controllers. The work includes RTL, synthesis, IP integration, and block-level verification. Candidates should have strong knowledge of communication and interface protocols, including PCI Express (Gen 3 and above), UALink, ESUN, and Ethernet. The role calls for end-to-end ownership of complex silicon designs, from architecture through GDS and production, as well as experience with silicon bring-up and debug. The position requires collaboration with customers and the ability to prioritize multiple tasks, prepare for customer meetings, and work independently. Candidates must be authorized to work in the United States and able to start immediately.
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Job Type
Full-time
Career Level
Principal