Principal Design Engineer

Astera Labs•San Jose, CA
•$185,000 - $240,000

About The Position

Astera Labs is seeking Principal Design Engineers to develop micro-architecture and implement front-end circuit design for high-performance network controllers. The work includes RTL, synthesis, IP integration, and block-level verification. Candidates should have strong knowledge of communication and interface protocols, including PCI Express (Gen 3 and above), UALink, ESUN, and Ethernet. The role calls for end-to-end ownership of complex silicon designs, from architecture through GDS and production, as well as experience with silicon bring-up and debug. The position requires collaboration with customers and the ability to prioritize multiple tasks, prepare for customer meetings, and work independently. Candidates must be authorized to work in the United States and able to start immediately.

Requirements

  • Bachelor’s degree in Electrical Engineering is required.
  • More than 8 years of experience supporting or developing complex SoC or silicon products for switch ASIC, networking, server, or storage applications.
  • Hands-on, thorough knowledge of high-speed protocols such as PCIe, UALink, ESUN, and Ethernet.
  • Proven front-end design expertise in architecture, RTL, simulation, synthesis, timing closure, GLS, and DFT.
  • Experience owning full-chip or block-level designs from architecture to GDS and driving complex designs to production.
  • Experience with Synopsys and/or Cadence digital design tools and flows.
  • Knowledge of design for test, including stuck-at and transition scan test insertion.
  • Familiarity with UVM-based design verification.
  • Silicon bring-up and debug expertise.
  • Experience with small-geometry CMOS at 28 nm or smaller.
  • Professional attitude, ability to prioritize multiple tasks, prepare for customer meetings, and work with minimal guidance and supervision.
  • Entrepreneurial, open-minded, can-do attitude, with a customer-focused approach.
  • Authorized to work in the United States and able to start immediately.

Nice To Haves

  • Master’s degree in Electrical Engineering.
  • Firmware development in C.
  • Scripting with Python or equivalent programming languages.
  • Development or support experience for PCIe or Ethernet switch products.

Responsibilities

  • Develop micro-architecture and implement front-end circuit design for high-performance network controllers.
  • Perform front-end design work including RTL, synthesis, IP integration, simulation, timing closure, GLS, and DFT.
  • Own full-chip or block-level designs from architecture through GDS, driving multiple complex designs to production.
  • Support or develop complex SoC and silicon products for switch ASIC, networking, server, or storage applications.
  • Prepare for customer meetings, prioritize multiple tasks, and work with minimal guidance and supervision.
  • Support silicon bring-up and debug.
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