Power Integrity Engineer

Intel•Chandler, AZ

23h•Hybrid

About The Position

As a Power Integrity Engineer at Intel, you will contribute to the development and validation of power delivery solutions for complex, high-speed silicon, package, and platform designs. You will work with cross-functional engineering teams to analyze, optimize, and validate power delivery networks from silicon through package and board. The role covers power delivery network development and analysis, electromagnetic model extraction, power-noise analysis, power-grid specifications, simulation, laboratory characterization, and correlation of measurements with pre-silicon models. You will also evaluate decoupling strategies, support voltage regulator characterization, develop platform-level recommendations, translate silicon power requirements into package and platform specifications, and collaborate across engineering teams to meet performance and form-factor requirements.

Requirements

Bachelor's degree in Electrical Engineering, Mechatronics Engineering, or a related STEM field and at least 1 year of experience, or a master's degree in one of those fields and at least 0 years of experience.
At least 1 year of experience in one or more of the following: power integrity or power delivery, power electronics, signal integrity, voltage regulator design or validation, PCB/package electrical modeling, electrical simulation, or electrical laboratory testing or validation.

Nice To Haves

Experience with printed circuit board (PCB) and/or semiconductor package design and technology.
Experience analyzing power delivery networks, including impedance, voltage-noise, transient-response, or decoupling behavior.
Experience with electrical simulation, electromagnetic extraction, or high-speed design tools such as HSPICE, Ansys HFSS, Keysight ADS, Cadence PowerSI, or Cadence PowerDC.
Knowledge of transmission-line theory, electromagnetic-field concepts, and passive component parasitics.
Knowledge of voltage regulator operation, control, transient response, and interaction with platform-level power delivery networks.
Experience using electrical laboratory equipment such as oscilloscopes, voltage/current probes, power supplies, and related measurement equipment.
Experience correlating simulation results with laboratory measurements.
Programming or scripting experience for engineering analysis and automation, such as Python, MATLAB, or similar tools.
Strong analytical, problem-solving, and technical communication skills.

Responsibilities

Develop and analyze power delivery networks (PDNs) for silicon, packages, boards, and high-speed platforms.
Perform 2D and 3D electromagnetic model extraction and power-noise analysis across the end-to-end power delivery path, including die/C4 bumps, package, socket, and board.
Define and evaluate power-grid specifications, power-noise budgets, and design targets that balance power integrity, performance, area, and platform requirements.
Apply power integrity principles and simulation methodologies to guide package and platform design and physical implementation.
Analyze PDN impedance, voltage droop, resonance, ground bounce, decoupling effectiveness, and other power-noise characteristics.
Develop electrical analysis methodologies, test structures, and verification plans for power delivery design and validation.
Perform laboratory measurements to characterize power noise across frequency, transient response, ground bounce, and other key PDN metrics.
Correlate post-silicon and platform measurements with pre-silicon simulations and models to improve design accuracy and methodology.
Evaluate and optimize on-die, package, and platform decoupling strategies.
Support voltage regulator performance characterization and optimization as part of the overall platform power delivery solution.
Develop platform-level power delivery and decoupling recommendations for incorporation into platform design guides.
Translate silicon power requirements into package and platform-level specifications and support design pathfinding to meet performance and form-factor requirements.
Collaborate with silicon integration, die floorplanning, package, board/platform, voltage regulator, and validation teams to optimize the end-to-end power delivery solution.