Power Engineer

Apple•Cupertino, CA

3d•$154,271 - $225,300

About The Position

Apple Inc. is hiring a Power Engineer in Cupertino, California, and various unanticipated locations throughout the USA. The role focuses on researching and developing low-power methods and power-intent verification, reviewing design flows for power-reduction opportunities, prototyping RTL and circuit test designs, and synthesizing and validating low-power designs for functionality, reliability, and testability. The engineer will develop software and validation utilities to support broad adoption and demonstrate the robustness of new low-power methodologies; estimate power savings and assess effects on system-level power, performance, and area; design and simulate energy-efficient circuits; modify and simulate standard-cell designs to reduce power consumption; and validate vendor CAD tools and features that support power minimization. The position is 40 hours per week. The stated base pay range is $154,271–$225,300 per year, with compensation dependent on skills, qualifications, experience, and location. Apple also describes employee stock programs, medical and dental coverage, retirement benefits, discounted products and free services, and reimbursement for certain career-related educational expenses, including tuition. The role might also be eligible for discretionary bonuses or commission payments and relocation.

Requirements

Master’s degree or foreign equivalent in Electrical and Computer Engineering or a related field.
Experience and/or education utilizing Low Power ASIC design to explore and prototype novel low-power methods.
Experience and/or education identifying opportunities to improve existing designs using Low Power ASIC design.
Experience and/or education using logic and RTL design to prototype, synthesize, and verify designs with new low-power methods.
Experience and/or education prototyping and simulating energy-efficient CMOS or mixed-signal circuits to implement design prototypes.
Experience and/or education developing custom CAD tools and scripts to automate large-scale design modifications.
Experience and/or education evaluating power and timing analysis of circuits and systems using industry-standard EDA flows.
Experience and/or education developing and maintaining automation scripts using Tcl, Python, or Perl to streamline design workflows, enhance productivity, and support CAD tool integration.

Responsibilities

Research new low-power methods and power-intent verification.
Review current design flows and methodologies to identify opportunities for power reduction.
Prototype test designs in RTL and circuits to demonstrate new low-power schemes.
Synthesize and validate low-power designs for functionality, reliability, and testability.
Develop software to automate design modifications for broad adoption of novel low-power methods.
Develop validation utilities to demonstrate the robustness of novel low-power methodologies.
Estimate power savings and assess the system-level impact of new methodologies on power, performance, and area.
Design and simulate novel energy-efficient circuits.
Modify and simulate existing standard-cell designs to minimize power consumption.
Validate vendor CAD tools and features that support power-minimization methods.

Benefits

Opportunity to participate in discretionary employee stock programs.
Eligibility for discretionary restricted stock unit awards.
Opportunity to purchase Apple stock at a discount through voluntary participation in the Employee Stock Purchase Plan.
Comprehensive medical coverage.
Dental coverage.
Retirement benefits.
Discounted products and free services.
Reimbursement for certain educational expenses, including tuition, for formal education related to advancing a career at Apple.
Possible eligibility for discretionary bonuses or commission payments.
Possible relocation assistance.