Apple Inc. is hiring a Power Engineer in Cupertino, California, and various unanticipated locations throughout the USA. The role models power dissipation and power delivery and establishes voltages for DVFM states of IPs, including Neural Engines, CPUs, Graphics, Computer (AI/ML) accelerators, media IPs, caches, and fabric. The engineer models power dissipation for customer use cases and works with Technology, Silicon Validation, and Product Engineering teams to establish voltage-frequency design points before and after silicon. The role also works with power lab and test teams to correlate models with hardware data. The position is 40 hours per week.
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Job Type
Full-time
Career Level
Mid Level