PMTS OPC Engineer
About The Position
The Optical Proximity Correction (OPC) Engineer develops computational lithography solutions that enable robust patterning and manufacturability of advanced semiconductor technologies. The role develops and maintains OPC technology files and works across lithography, design rules, etch, modeling, and infrastructure teams to improve pattern fidelity, process margin, and yield. The engineer develops, qualifies, maintains, and optimizes OPC technology files, recipes, and computational lithography solutions for advanced-generation semiconductor lithography processes. They develop and evaluate OPC strategies, model-based corrections, and patterning solutions, and validate and release those solutions through simulation-to-wafer correlation, process-window assessment, hotspot verification, and quality and change-control methodologies. The role also performs root-cause analysis of printing, patterning, and yield-limiting hotspots, develops automated analysis and data-processing workflows, and contributes to cross-functional technology development projects. The position requires a relevant bachelor's degree, working knowledge of semiconductor lithography and OPC, experience with computational lithography or related patterning tools, data-analysis and root-cause skills, and scripting or programming ability. Travel may be up to 10%.
Requirements
- Bachelor’s degree in Electrical Engineering, Computer Engineering, Physics, Applied Physics, Materials Science, Chemical Engineering, or a related technical field.
- Relevant experience in optical proximity correction, computational lithography, semiconductor lithography, patterning, or a related field; the required number of years depends on the applicable career level and scoping guidelines.
- Working knowledge of semiconductor lithography, optical proximity effects, OPC concepts, process-window behavior, pattern fidelity, and semiconductor manufacturing fundamentals.
- Experience with computational lithography, OPC development, lithography simulation, hotspot analysis, or related semiconductor patterning tools and methodologies.
- Ability to analyze complex simulation and wafer data, perform structured root-cause analysis, and translate findings into computational or process improvements.
- Experience with scripting or programming for engineering automation and data analysis, such as Python, Perl, Tcl, shell scripting, or equivalent.
- Fluency in written and spoken English.
- Willingness to travel up to 10%.
Nice To Haves
- Master’s degree or PhD in Electrical Engineering, Physics, Applied Physics, Materials Science, Chemical Engineering, or a related technical field.
- Experience developing, qualifying, and maintaining production OPC technology files for advanced semiconductor process technologies.
- Experience with model-based OPC, lithography modeling, computational patterning, process-window optimization, mask data preparation, or design-technology co-optimization.
- Familiarity with leading computational lithography and OPC platforms and large-scale compute environments used for semiconductor mask synthesis and verification.
- Experience correlating computational lithography simulations with wafer metrology and using silicon results to improve OPC models, recipes, or process assumptions.
- Understanding of interactions among lithography, etch, design rules, mask manufacturing, metrology, and yield.
- Project management skills, including the ability to innovate, execute on solutions, and navigate ambiguity.
- Strong written and verbal communication skills.
- Strong planning and organizational skills.
Responsibilities
- Develop, qualify, maintain, and optimize OPC technology files, recipes, and computational lithography solutions for advanced-generation semiconductor lithography processes.
- Develop and evaluate OPC strategies, model-based corrections, and patterning solutions to improve wafer pattern fidelity, process-window performance, manufacturability, and yield.
- Collaborate with design rule, lithography, etch, metrology, modeling, mask, and computational infrastructure engineers to define and implement computational patterning solutions.
- Perform root-cause analysis of printing, patterning, and yield-limiting hotspots using simulation, wafer data, design data, and computational lithography analysis tools.
- Validate and release OPC solutions through simulation-to-wafer correlation, process-window assessment, hotspot verification, and quality and change-control methodologies.
- Develop automated analysis, verification, and data-processing workflows to improve OPC development efficiency, coverage, reproducibility, and cycle time.
- Research, apply, and improve industry and company practices in OPC, computational lithography, patterning optimization, and design-to-manufacturing interaction.
- Participate in cross-functional semiconductor technology development projects and communicate technical results, risks, recommendations, and solution readiness to stakeholders.
- Perform work safely and responsibly and support Environmental, Health, Safety & Security requirements and programs.
- Collaborate on other projects and assignments as needed.
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What This Job Offers
Job Type
Full-time
