PMIC Analog Intern

Renesas Electronics • San Jose, CA

1d

About The Position

Renesas MID (Memory Interface Division) is seeking a PMIC Analog Intern to support development of the next-generation DDR PMIC. During the internship, the intern will research a PMIC control architecture that could be used in a future DDR PMIC. They will receive support from design engineering (DE) and applications engineering (AE), perform simulations at different levels, and build circuits in Cadence.

The internship runs from May 24 to August 13, 2027. The position may be located in San Jose, San Diego, or Plano. Strong performance during the internship may lead to an offer of full-time employment at Renesas.

Requirements

• Must be a current Ph.D. or master's student and must not have graduated before September 2027.
• Solid background in power electronics and analog design.
• Familiarity with a behavioral simulation tool such as SIMPLIS and with transistor-level design environments in Cadence.

Nice To Haves

• Self-driven research capability is preferred.

Responsibilities

• Research a PMIC control architecture that could be used in a next-generation DDR PMIC.
• Perform simulations at different levels.
• Build circuits in Cadence.

Benefits

• Interns may be eligible for company-provided sick leave, holiday pay, and medical, dental, and vision insurance, subject to company policy and applicable law.

What This Job Offers

• Career Level: Intern