Packaging Module Development Engineer

Intel Corporation•Chandler, AZ
•$133,800 - $188,890•Onsite

About The Position

Intel’s Advanced Packaging Technology Manufacturing (APTM) division develops and commercializes semiconductor packaging technologies for mobile, edge, and hyperscale computing platforms. The Assembly Technology Development (ATD) team develops package assembly solutions and scales them for high-volume manufacturing. The Packaging Module Development Engineer will be based at Intel’s Arizona campus and contribute to technology and foundry capabilities by developing advanced thermal interface and warpage mitigation solutions. The role involves materials science and mechanical engineering, including innovating materials, qualifying assembly equipment, and working with global teams to optimize assembly processes for quality, yield, and high-volume manufacturability.

Requirements

  • Master’s degree or PhD in Materials Science, Mechanical Engineering, Electrical Engineering, Physics, Applied Physics, or a related STEM field.
  • At least 1 year of experience in materials characterization, packaging process development, or mechanical testing. Experience may be gained through academic research, coursework, internships, or industry work.
  • Minimum GPA of 3.5 on a 4.0 scale.
  • At least one publication as a primary or contributing author in a peer-reviewed technical journal.
  • Strong critical-thinking skills and an aptitude for coaching, developing, and leading technical teams.
  • Flexibility in managing changing priorities, fluctuating timelines, and dynamic demands.
  • Interpersonal skills to align priorities across matrixed, cross-organizational business units.
  • Self-directed initiative and focus to drive complex research independently.

Nice To Haves

  • At least 1 year of semiconductor packaging technology development experience, including hands-on application of Statistical Process Control (SPC) or Design of Experiments (DOE).
  • At least 1 year of experience executing complex, time-critical engineering projects in a semiconductor foundry or manufacturing environment.
  • At least 1 year of experience using Python, MATLAB, or SQL to analyze multidimensional engineering datasets.

Responsibilities

  • Develop, qualify, and implement thermal interface and warpage mitigation solutions for future packaging platforms.
  • Collaborate with cross-functional, matrixed teams to optimize advanced assembly processes for quality, reliability, cost, yield, productivity, and high-volume scalability.
  • Research and qualify next-generation materials, equipment, and fabrication processes to enhance packaging capabilities at scale.
  • Manage engineering project milestones to meet technology development and product timelines.
  • Use statistical methods, structural judgment, and materials analysis to resolve complex packaging assembly failures.
  • Provide sustaining engineering support for equipment performance and process health in high-volume manufacturing lines.
  • Respond to foundry customer technical requests and promptly resolve process integration events.

Benefits

  • Competitive pay
  • Stock bonuses
  • Health benefits
  • Retirement benefits
  • Vacation
© 2026 Teal Labs, Inc
Privacy PolicyTerms of Service