NoC Interconnect Design Engineer and Architect

Qualcomm • Santa Clara, CA

9d • $134,500 - $201,700

About The Position

Qualcomm Technologies, Inc. is seeking an ASIC Engineer for work in its Engineering Group, ASICs Engineering. The role applies ASIC knowledge and experience to define, model, design, optimize, verify, validate, implement, and document IP (block/SoC) development for high-performance, high-quality, low-power products. The engineer creates architectures, circuit specifications, logic designs, and system simulations based on system-level requirements, and collaborates with software and hardware architecture teams to develop implementation strategies that meet system requirements and customer needs.

The position evaluates the design process from high-level design through synthesis, place and route, timing, power usage, and verification, or comparable custom circuit design and layout flows. It uses tools such as RTL-to-GDS flow tools and Virtuoso to support architecture and design of a block, SoC, or IC package, and requires detailed technical documentation. The role works independently with minimal supervision, handles tasks requiring planning and prioritization, and may influence decisions beyond the immediate work group.

Requirements

• Bachelor's degree in Science, Engineering, or a related field and 2+ years of ASIC design, verification, validation, integration, or related work experience; or a master's degree in Science, Engineering, or a related field and 1+ year of such experience; or a PhD in Science, Engineering, or a related field.
• Verbal and written communication skills to convey information; basic negotiation, influence, and tact may be required.
• Ability to work independently with minimal supervision and to plan, solve problems, and prioritize tasks.

Nice To Haves

• Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.
• 3+ years of ASIC design, verification, validation, integration, or related work experience.
• 2+ years of experience with architecture and design tools.
• 2+ years of experience with scripting tools and programming languages.
• 2+ years of experience with design verification methods.

Responsibilities

• Define, model, design, optimize, verify, validate, implement, and document IP (block/SoC) development for high-performance, high-quality, low-power products.
• Create architectures, circuit specifications, logic designs, and system simulations based on system-level requirements.
• Collaborate with teams such as software architecture and hardware architecture to develop and execute implementation strategies that meet system requirements and customer needs.
• Evaluate design process flows, including high-level design, synthesis, place and route, timing, power usage, and verification, or comparable custom circuit design and layout flows.
• Use tools and applications such as RTL-to-GDS flow tools and Virtuoso to enable architecture and design of a block/SoC or IC package.
• Write detailed technical documentation for EDA/IP/ASIC projects.

Benefits

• Competitive annual discretionary bonus program.
• Opportunity for annual RSU grants, except for employees on sales-incentive plans.
• Competitive benefits package designed to support employees at work, at home, and at play.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level