Experienced Module Integration Engineer

Samsung•Austin, TX

2d•Onsite

About The Position

We are seeking a motivated and high-caliber Module Integration Engineer to join our 2nm GAAFET team. This role focuses on the Front-End-of-Line (FEOL) integration, specifically targeting the RPMG (Replacement Metal Gate) and CTSDB (PC and NS isolation) modules. As we transition from FinFET to GAAFET (Gate-All-Around FET) architecture, you will play a critical role in bridging the gap between unit process development and overall device performance. You will work at the intersection of lithography, etch, deposition, and device physics to ensure the successful integration of the gate stack and contact modules for the next generation of computing.

Requirements

Masters in Materials Science, Chemistry, Physical Chemistry, Physics or a closely related field (industry experience can substitute for advanced degree).
2-3 years of relevant experience preferred, but not required for consideration.
Knowledge of MOSFET Physics (GAAFET preferred but FinFET also desired): Deep understanding of device physics, especially for interfacial physics (gate oxide, threshold voltage control, gate capacitance, performance and reliability etc.).
Process knowledge: Experience with or ability to understand various semiconductor process such as depositions (ALD/CVD), etch, and CMP, etc.
Intermediate proficiency in Python, R, SQL for automating data extraction and visualization.
High level of comfort and experience in Microsoft Excel and PPT. Excel skills should include basic understand and use of key data manipulation formulas such as VLOOKUP and MATCH.
Proficiency in Spotfire, Minitab, or similar statistical software for yield and process analysis.
Awareness or experience with various workflow styles like Waterfall and Agile, as well as experience with Software such as Confluence and Jira.
This role may require access to information subject to U.S. export control laws. Applicants must be authorized to access such information or eligible for government authorization.

Nice To Haves

Preference for Ph.D. in Materials Science, Chemistry, Physical Chemistry, Physics or a closely related field.

Responsibilities

Support the integration and optimization of the RPMG and CTSDB modules to meet target device specifications for the 2nm node. Duties will require daily and consistent trend monitoring and quick responsive actions when needed.
Collaborate with unit process engineers (Etch, CVD, ALD, CMP, Litho) to respond effectively to any module risks or issues related to process control and optimization.
Execute and analyze DOE (Design of Experiments) to evaluate the impact of process variations on electrical performance.
Understand advanced metrology and analysis data (TEM, SEM, AFM, EDX) for identify root causes of module failures and implement corrective actions.
Leverage statistical software (e.g., Cloud Data Sources, Spotfire, Python, etc.) to analyze large datasets and correlate process parameters with device yield.
Participate in design reviews and synchronization meetings with the Device and Layout teams to ensure manufacturability.