Module Engineer On Shift (MEOS)

Intel Corporation•Chandler, AZ

2d•$85,200 - $162,500•Onsite

About The Position

Intel's Epoxy MEOS team in Arizona is seeking a Packaging Module Development Engineer to develop and optimize assembly and packaging processes for next-generation semiconductor products. The role contributes to product quality, reliability, performance, cost, yield, and manufacturability in a manufacturing and engineering environment. It is intended for an early-career engineer who will collaborate with cross-functional teams and suppliers while supporting packaging technology development and manufacturing improvements. The position is on-site in Phoenix, Arizona, and follows Shift 4: 6:00 PM–6:00 AM on an alternating weekly schedule, described as nights frontend, Sunday–Tuesday and alternating Saturday nights. Intel states that the position is not eligible for immigration sponsorship.

Requirements

Bachelor's degree in mechanical engineering, materials science engineering, chemical engineering, electrical engineering, applied technology, or a related field.
At least 2 years of hands-on experience in assembly and packaging technologies or technology manufacturing.
Curiosity and eagerness to learn.
Ability to collaborate and build working relationships with colleagues, suppliers, and stakeholders.
Analytical and creative problem-solving skills, including the ability to work through ambiguous situations.
Attention to detail and precision when working with complex processes and specifications.
Ability to communicate technical concepts clearly to technical and non-technical audiences.
Adaptability in a fast-paced environment and ability to manage shifting priorities.
Initiative, follow-through, and accountability for work quality.

Nice To Haves

At least 2 years of experience with Statistical Process Control (SPC) and Design of Experiments (DOE) principles.
At least 2 years of experience with laser, optical systems, or semiconductor assembly processes.
At least 2 years of experience in technology manufacturing or a semiconductor packaging environment.
At least 2 years of experience with equipment adjustment, process characterization, and manufacturability in semiconductor or electronics assembly settings.
Experience with data science and statistics tools such as Python, JMP, or Minitab for data analysis and visualization.

Responsibilities

Design and develop assembly packaging processes and equipment for next-generation semiconductor technologies.
Optimize manufacturing processes to meet quality, reliability, cost, yield, productivity, and manufacturability requirements.
Apply Statistical Process Control (SPC) and Design of Experiments (DOE) principles to create and refine process and equipment specifications.
Conduct tests under simulated field conditions, including heat, humidity, and dynamic forces, to evaluate silicon and package technologies.
Oversee package design manufacturability and manage packaging processes, procedures, and workflows throughout their lifecycle.
Collaborate with suppliers and procurement teams to establish material specifications and ensure compliance with quality and performance standards.
Develop techniques, tools, and quality screens to identify packaging quality and reliability issues early in development.
Set reliability standards based on failure mechanisms and inform design, material selection, and process development.
Provide technical consultation and support for packaging process improvements, responding to internal customer and client needs.
Drive standardization in product qualification, manufacturing quality systems, and engineering practices in alignment with product milestones.