Integrated Circuit Design Verification Engineer

Battelle • Columbus, OH

6d • $86,400 - $123,100 • Hybrid

About The Position

Battelle's Advanced Microsystem Solutions Division develops advanced integrated circuit technologies and hardware assurance solutions for government and commercial customers. The RTL Verification Engineer will support verification and validation of complex digital integrated circuits and systems-on-chip (SoCs) in Columbus, Ohio.

The role develops and executes verification strategies for advanced digital designs, working closely with design and architecture teams throughout the development lifecycle. It involves building UVM-based verification environments, developing SystemVerilog testbenches, and performing functional verification at both block and SoC levels. The work supports microelectronics programs involving secure and high-performance computing technologies in a collaborative engineering environment.

The stated salary range is $86,400–$123,100 per year. Battelle offers a hybrid work arrangement described as 60% in-office and 40% remote, subject to team and position needs, and a compressed schedule with every other Friday off for most of the team. Benefits include paid time off, medical, dental, and vision coverage, wellness incentives, optional supplemental benefits, a 401(k) plan with employer contributions and matching, and tuition assistance.

Requirements

• Bachelor's or master's degree in Electrical Engineering, Computer Engineering, or a related technical field.
• At least 3 years of digital design verification experience.
• Expertise in Universal Verification Methodology (UVM).
• Strong SystemVerilog knowledge.
• SystemVerilog TLM (Transaction Level Modeling) development experience.
• C++ programming experience for DPI (Direct Programming Interface) integration with SystemVerilog models.
• C programming experience for bare-metal embedded systems development.
• Block-level and SoC-level validation experience.
• Verification planning and test plan development experience.
• Functional coverage and code coverage analysis experience.
• Experience with constrained-random verification techniques.
• Debugging and root-cause analysis skills.
• Understanding of digital design concepts and microarchitecture.
• Knowledge of version control (Git).
• Must be a US citizen and able to obtain and maintain a US Government security clearance.

Nice To Haves

• Formal verification experience, including model checking or property verification.
• SystemVerilog Assertions (SVA) design and verification experience.
• Python programming experience.
• Low-power verification (UPF) experience.
• Hardware/software co-verification experience.
• Bus protocol knowledge, such as AXI, AHB, APB, or PCIe.
• Knowledge of the RISC-V ISA.
• Familiarity with emulation and FPGA prototyping.
• Verification IP (VIP) development experience.
• Experience with assured microelectronics and hardware security principles, including cryptography, side-channel analysis, fault injection, radiation tolerance, or hardware CWEs.
• Active Secret or Top-Secret US Government security clearance.

Responsibilities

• Develop and maintain UVM-based verification environments for block- and SoC-level designs.
• Write SoC testbenches and verification code.
• Create verification plans and test strategies.
• Implement constrained-random and directed tests.
• Develop functional coverage models and analyze coverage metrics.
• Debug RTL and testbench issues and perform root-cause analysis.
• Collaborate with design engineers to review specifications and identify verification requirements.
• Review and enhance verification infrastructure and methodologies.
• Run regression testing and track verification progress.
• Document verification results and present status to the team and/or project leadership.

Benefits

• Paid time off.
• Medical, dental, and vision coverage.
• Wellness incentives and benefits.
• Optional supplemental benefits.
• 401(k) retirement savings plan; for most employees Battelle contributes 5% regardless of employee contributions and matches employee contributions.
• Tuition assistance.
• Compressed work schedule with every other Friday off for most of the team.
• Hybrid work flexibility, described as 60% in-office and 40% remote, subject to team and position needs.
• Coverage and support for partners, gender-affirming care, and family formation.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level