Image Sensor Characterization Engineer

MIT Lincoln Laboratory•Lexington, MA
•$114,000 - $164,000

About The Position

The Advanced Imager Technology Group conducts research and development on imager devices and subsystem-level technology for the DoD and scientific community. Its work includes visible- and infrared-band detectors for applications such as ground- and space-based surveillance, adaptive optics, and astronomy, as well as device and materials development, integrated circuit design and fabrication, custom packaging, detector hybridization, and control and readout electronics for system-level demonstrations. The Image Sensor Characterization Engineer tests visible- and short-wave-infrared-band charge-coupled device (CCD) and active-pixel sensor (APS) imagers. The role involves characterizing image sensor performance at wafer, chip, and packaged-device levels; investigating observed results; developing test infrastructure; and documenting test findings. The engineer also works with packaging personnel and contributes to capabilities such as custom cryostats and optical testbeds. This is an Associate Staff position. Associate Staff members contribute independently to multidisciplinary research and development efforts, take part in program activities with increasing responsibility, and may own project components or lead workstreams and small teams. Work may include hardware and software development, systems and data analysis, component fabrication, integration, testing, documentation, and sponsor briefings. Candidates are considered at Level 3 or Level 4 based on education, experience, technical capability, leadership responsibilities, and prior work scope and complexity.

Requirements

  • Bachelor’s degree in Electrical Engineering or a related field, or another STEM discipline or relevant technical field as applicable to the Associate Staff level criteria; an equivalent combination of education and experience may be considered.
  • For Level 3: typically 2 or more years of relevant experience with a bachelor’s degree, or typically 0 or more years with a master’s degree, or equivalent education and experience.
  • For Level 4: typically 4 or more years of relevant experience with a bachelor’s degree, or typically 2 or more years with a master’s degree; a PhD may be considered, or equivalent education and experience.
  • Deep expertise in at least two of the following: scientific CMOS or CCD imager testing, camera electronics, semiconductor device physics, semiconductor wafer probing, image sensor device design, transistor modeling and characterization, or printed circuit board design.
  • Ability to apply technical knowledge independently and solve complex technical problems.
  • Ability to manage components of project work; Level 4 candidates should demonstrate ability to lead project components or technical workstreams and manage milestones, dependencies, risks, and deliverables for assigned areas.
  • Experience contributing to technical documentation, analyses, reports, presentations, or project deliverables.
  • Ability to communicate technical information clearly, collaborate across project teams, and communicate complex information to varied audiences as appropriate to level.
  • Ability to guide or mentor colleagues and contribute to team capability development; Level 4 candidates should demonstrate mentoring and work-review capabilities.
  • Ability to obtain and maintain a Secret-level DoD security clearance.
  • U.S. citizenship is required.
  • Selected candidate must undergo a pre-employment background investigation.

Responsibilities

  • Characterize imager performance at wafer, chip, and packaged-device levels, including shorts-opens yield, dark current, charge-transfer efficiency, and quantum efficiency.
  • Form hypotheses to explain observed performance and measure test-block structures, such as discrete transistors, to evaluate those hypotheses.
  • Write reports summarizing test results for internal and external audiences and archive test data.
  • Design and procure printed circuit boards to interface image sensors with test electronics and automated wafer probers.
  • Maintain image-sensor operating electronics and identify opportunities to improve testing infrastructure.
  • Review computer-aided-design (CAD) device layouts to identify potential issues that could adversely affect performance or yield.
  • Contribute to developing capabilities such as custom cryostats and optical testbeds.
  • Coordinate with the packaging team to identify and procure hardware for packaging image sensors, and provide documentation for wafer dicing and package assembly.
  • Own or lead design, development, analysis, programming, modeling, simulation, integration, testing, troubleshooting, and technical evaluation activities within broader programs.
  • Apply technical judgment to complex, less-defined problems; identify methods, adapt approaches, and evaluate trade-offs.
  • Contribute to or lead system-, subsystem-, or component-level work across disciplines, mission needs, products, or technical focus areas.
  • Develop, review, and integrate technical documentation, analyses, design materials, program reports, presentations, papers, and other deliverables.
  • Coordinate milestones, assumptions, dependencies, quality expectations, and risks, and present findings, recommendations, and alternatives to relevant audiences.
  • Provide technical guidance, review, feedback, and mentorship.

Benefits

  • Comprehensive health, dental, and vision plans
  • MIT-funded pension
  • Matching 401K
  • Paid leave, including vacation, sick, parental, and military leave
  • Tuition reimbursement
  • Continuing education programs
  • Mentorship programs
  • Work-life balance options
  • Voluntary benefits, discounts, and perks
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