Qualcomm's Mixed-Signal PHY design team is seeking an analog and mixed-signal circuit designer to work on SerDes PHY designs. The engineer will contribute to next-generation PHY designs for SoCs and join a growing team conducting architecture analysis in leading-edge CMOS process technology nodes at 7nm and beyond. Design goals include low-power analog circuits for Qualcomm's wireline interface needs. The role's primary responsibility is to work within a team to deliver analog and mixed-signal transistor-level circuit designs and supervise physical layouts of high-speed, low-power PHY SerDes blocks. Experience with transceiver or clocking designs above 32 Gbps is highly desired.
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Job Type
Full-time
Career Level
Entry Level