MTS - HIG HBM - ARCHITECTURE

Micron Technology•Richardson, TX

About The Position

Micron Technology's High-Performance Integrated Group (HIG) is seeking an HBM IO Design Architecture Engineer to develop and manage the end-to-end design quality system. This includes delivering design checklists, analyzing silicon data, and establishing a cross-team data collection framework to ensure silicon learnings are systematically incorporated into future designs. The role emphasizes hands-on experience in design execution, simulation-to-silicon correlation, and developing cross-functional methodologies, with a focus on AI-driven analysis and data-driven decision-making to enhance quality improvement cycles.

Requirements

  • Prior industrial experience in high-speed clocking design at 32Gbps+ speed
  • Good IO circuit design background with familiarity of both, analog and digital design and simulation experience required
  • Experience with circuit verification and optimization including layout verification and parasitic extractions of the circuits
  • Familiar with one or more off-chip protocols such as UCIe, HBM, DDR, PCIe, MIPI, etc
  • Good understanding on state-of-the-arts device characteristics and hands-on design experience
  • Excellent problem-solving and analytical skills
  • Strong documentation skills
  • Strong communication skills with the ability to clearly convey sophisticated technical concepts to other design peers both verbally and written
  • MS or PhD in EE
  • 10+ years of relevant Engineering or Design Engineering experience on high-speed IO, PLL, Tx, Rx, Equalization, clock tree

Nice To Haves

  • Prior circuit debug experience through Product Engineering or equivalent preferred
  • Knowledge of advanced packaging environments (CoWoS, HBM stack, D2D, etc)

Responsibilities

  • High-speed IO design architecture for HBM products
  • Define and standardize IO design quality process from architecture to silicon
  • Work with Product Engineering to correlate silicon measurements and simulation performance for circuit level design analysis
  • Contribute to cross group communication to work towards standardization and group success
  • Proactively solicit input from Standards, CAD, modeling, and verification groups to ensure the design quality
  • Drive innovation into the future Memory generation with multifaceted work environment
  • Leverage AI Assisted analytics to accelerate root cause identification from complex multi-variable silicon data

Benefits

  • Choice of medical, dental and vision plans
  • Benefit programs that help protect your income if you are unable to work due to illness or injury
  • Paid family leave
  • Robust paid time-off program
  • Paid holidays
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