Mts - Hig Hbm - Architecture

Micron • Richardson, TX

11d

About The Position

Micron Technology is a world leader in innovating memory and storage solutions. The High-Performance Integrated Group (HIG) is a division within the Technology and Products Group (TPG) dedicated to developing and optimizing High Bandwidth Memory (HBM) solutions for AI and ML applications, aiming to deliver the lowest power per bit solutions in the industry. This role involves building and owning the end-to-end design quality system, including design checklist delivery, silicon data analysis, and a cross-team data collection framework. The goal is to ensure silicon learnings are systematically captured and fed back into the project before the next generation design is finalized. The ideal candidate will have hands-on experience in design execution, simulation to silicon correlation, and cross-functional methodology development, embracing AI-driven analysis and data-driven decision making to accelerate quality improvement cycles.

Requirements

• Prior industrial experience in high-speed clocking design at 32Gbps+ speed
• Good IO circuit design background with familiarity of both, analog and digital design and simulation experience required
• Experience with circuit verification and optimization including layout verification and parasitic extractions of the circuits
• Familiar with one or more off-chip protocols such as UCIe, HBM, DDR, PCIe, MIPI, etc
• Good understanding on state-of-the-arts device characteristics and hands-on design experience
• Excellent problem-solving and analytical skills
• Strong documentation skills
• Strong communication skills with the ability to clearly convey sophisticated technical concepts to other design peers both verbally and written
• Prior circuit debug experience through Product Engineering or equivalent preferred
• MS or PhD in EE
• 10+ years of relevant Engineering or Design Engineering experience on high-speed IO, PLL, Tx, Rx, Equalization, clock tree

Nice To Haves

• Knowledge of advanced packaging environments (CoWoS, HBM stack, D2D, etc)

Responsibilities

• High-speed IO design architecture for HBM products
• Define and standardize IO design quality process from architecture to silicon
• Work with Product Engineering to correlate silicon measurements and simulation performance for circuit level design analysis
• Contribute to cross group communication to work towards standardization and group success
• Proactively solicit input from Standards, CAD, modeling, and verification groups to ensure the design quality
• Drive innovation into the future Memory generation with multifaceted work environment
• Leverage AI Assisted analytics to accelerate root cause identification from complex multi-variable silicon data

Benefits

• Choice of medical, dental and vision plans
• Benefit programs that help protect your income if you are unable to work due to illness or injury
• Paid family leave
• Robust paid time-off program
• Paid holidays

What This Job Offers

• Job Type: Full-time
• Career Level: Senior