About The Position

The Hardware Design Engineer Technical Lead is a key member of Cisco’s Purpose Built Switch hardware team, defining and designing next-generation Hyperscaler Switch hardware based on Silicon One and/or merchant ASICs. The role covers system- and board-level specifications, schematic capture, FPGA design, and ASIC/system-level bring-up and troubleshooting. The engineer works with ASIC, DFT, Signal Integrity, software, diagnostics, and manufacturing teams to bring up systems and resolve design issues; debugs hardware in labs using scopes and analyzers; and serves as a technical liaison with major component suppliers.

Requirements

  • Bachelor’s degree plus 12 years of related experience, master’s degree plus 8 years, Ph.D. plus 5 years, or equivalent related work experience.
  • Prior experience with common hardware technologies, including power, clock, memory, CPU, and a variety of system interfaces.
  • Previous experience with complex high-speed board design and board bring-up.
  • Experience with schematics/layout, hardware bring-up, troubleshooting, and system-level testing.
  • Experience working with software teams on system bring-up and porting, including device configuration at the register level.

Nice To Haves

  • Experience with schematic, PCB, and Verilog HDL/VHDL design.
  • Experience with scripting languages such as Python and Tcl.
  • Experience with lab bring-up and product design validation.
  • Knowledge of the Ethernet protocol.
  • Experience with access-switch Ethernet interfaces, including gigabit, multi-gigabit, and 10-gigabit.
  • Experience with high-speed Ethernet interfaces, including 25G, 100G, 400G, and 800G.
  • Experience with DRAM, CPU subcomplexes, and control interfaces such as PCIe, I2C, SPI, and MDC/MDIO.
  • Self-motivation, teamwork, and strong communication skills.

Responsibilities

  • Define and design next-generation Hyperscaler Switch hardware based on Silicon One and/or merchant ASICs.
  • Develop system- and board-level specifications.
  • Perform schematic capture and FPGA design.
  • Bring up and troubleshoot ASIC- and system-level hardware.
  • Work with ASIC, DFT, Signal Integrity, software, diagnostics, and manufacturing teams to resolve design issues and bring up systems.
  • Debug and troubleshoot hardware in labs using scopes and analyzers.
  • Act as the technical liaison with major component suppliers.

Benefits

  • Medical, dental, and vision insurance.
  • 401(k) plan with a Cisco matching contribution.
  • Paid parental leave.
  • Short- and long-term disability coverage.
  • Basic life insurance.
  • Paid holidays and a floating holiday for non-exempt employees.
  • Birthday day off, paid year-end holiday shutdown, and personal wellness days.
  • Paid vacation or flexible vacation time off, depending on employee classification.
  • Sick time off, with unused sick time carryover up to the stated limit.
  • Additional paid time away may be requested for critical or emergency family issues.
  • Optional paid volunteer days.
  • Annual bonuses for eligible non-sales employees, subject to Cisco policies.
  • Potential eligibility for Cisco restricted stock unit grants, subject to continued employment and vesting terms.
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