Formal Validation Engineer

Apple • Cupertino, CA

2d

About The Position

Apple Inc. is hiring a Formal Validation Engineer to work on complete formal verification for one or more design blocks and IPs, including CPU, cellular and connectivity IP, audio and image processing IP, neural networks IP, memory/OMA controllers, security IP, peripheral IP, interconnects, and power management subsystems. The role works with Apple Silicon system-on-chip and IP design engineers to develop formal microarchitecture specifications and comprehensive formal verification test plans. The engineer proves design properties, finds design bugs, and works with design teams to improve microarchitecture. The role also develops creative approaches to verifying complex microarchitectures, creates reusable and optimized formal models and verification code, and architects correct-by-construction design methodologies to improve formal verification efficiency and productivity. The position is based in Cupertino, California, and various unanticipated locations throughout the USA. The schedule is 40 hours per week.

Requirements

• Bachelor’s degree or foreign equivalent in Computer Engineering, Electrical Engineering, Electronics Engineering, or a related field.
• Experience or education working with digital hardware design principles.
• Experience or education using model-checking approaches to verify systems, such as hardware or protocols.
• Experience or education applying general formal methods principles.
• Experience or education communicating formal verification plans and results to dynamic validation and design partners.
• Experience or education analyzing computer architecture and SoCs.
• Experience or education with a hardware description language, including Verilog or VHDL, and using it to develop formal test benches.
• Experience or education using scripting languages such as Python, Perl, or TCL in a hardware engineering and CAD context.

Responsibilities

• Complete formal verification for one or more design blocks and IPs.
• Work with Apple Silicon SoC and IP design engineers to develop formal microarchitecture specifications.
• Develop comprehensive formal verification test plans.
• Prove design properties, find design bugs, and work with design teams to improve microarchitecture.
• Develop novel approaches for verifying complex design microarchitectures.
• Develop reusable and optimized formal models and verification code.
• Architect correct-by-construction design methodologies to improve formal verification efficiency and productivity.

Benefits

• Comprehensive medical coverage
• Dental coverage
• Retirement benefits
• Discounted products and free services
• Tuition reimbursement for certain educational expenses related to advancing a career at Apple
• Potential discretionary bonuses or commission payments
• Potential relocation assistance
• Opportunity to participate in discretionary restricted stock unit awards
• Opportunity to purchase Apple stock at a discount through the Employee Stock Purchase Plan

What This Job Offers

• Job Type: Full-time