EDA Tools Software Engineer

Intel•Chandler, AZ

1d•Hybrid

About The Position

Intel Foundry Technology Manufacturing’s Advanced Packaging Technology and Manufacturing group is seeking a CAD/EDA Tools Software Engineer to support package design tools, flows, and methodologies. The role involves designing, developing, testing, and debugging software tools; improving design flows; and implementing scalable solutions that enhance engineering productivity, user experience, and design efficiency. The engineer will work with design engineers, CAD teams, infrastructure partners, and EDA vendors, with a focus on Cadence Advanced Package Design (APD), SKILL, and automation using industry-standard package design tools. The position supports internal and Foundry package design teams. It includes troubleshooting EDA tools and engineering environments, gathering requirements and addressing user pain points, defining and deploying tool features, documenting methods and workflows, and building test cases for debugging, validation, and signoff. The engineer will also create and verify package designs that integrate components into hierarchical systems for end-to-end tool testing of advanced technologies. The role is based in Phoenix, Arizona, with Hillsboro, Oregon also listed as a location, and is eligible for Intel’s hybrid work model. It is an experienced-hire position and is not eligible for Intel immigration sponsorship. The posted annual salary range for US locations is $149,600–$211,200; actual pay depends on location and other factors.

Requirements

Bachelor’s degree in Computer Science, Electrical Engineering, Computer Engineering, Software Development, Software Engineering, or a STEM-related field.
At least 4 years of experience in IC digital design, package design, or EDA tools.
Experience with EDA tools from vendors such as Cadence, Synopsys, or Siemens; examples include Cadence Virtuoso, Innovus, Synopsys 3DIC Compiler, and Siemens Calibre.
Experience using scripting languages such as Python, TCL, SKILL, VBScript, or Perl to automate workflows.
Experience interfacing with customers and stakeholders to analyze design challenges or define functional specifications for EDA vendors.
Customer-oriented mindset, self-direction, results orientation, ability to handle multiple tasks, teamwork, analytical problem-solving, and effective communication and collaboration skills.

Nice To Haves

Master’s degree in Computer Science, Electrical Engineering, or a related STEM field.
At least 6 years of experience in IC digital design, package design, or EDA tools.
Experience with computational geometry, silicon or assembly processes, or test and characterization techniques.
Experience with large SoC or multi-die package design implementation flows.
Scripting and automation experience in EDA environments.
Experience supporting Design Automation, CAD, or package design environments.
Demonstrated ability to lead cross-functional infrastructure and automation improvement initiatives.
Expertise in Cadence Advanced Package Design (APD) tools and SKILL.

Responsibilities

Troubleshoot and resolve user issues involving EDA tools, internal automation, engineering environments, infrastructure, and design-flow execution.
Partner with engineering teams to gather requirements, identify pain points, improve design flows, and deploy new features.
Collaborate with internal design, reliability, and CAD teams and external EDA vendors to resolve technical issues and define and implement tool features and requirements.
Develop technical documentation, user guides, and best-known methods to improve design efficiency, flows, and package design methodologies.
Communicate effectively with diverse engineering and design teams and a large end-user community, providing customer support.
Build and execute test cases for debugging, validation, and tool signoffs.
Create and verify package designs, integrating components into hierarchical systems to support end-to-end EDA tool testing for advanced technologies.