DSP Engineer

Steely•Reston, VA

13h•$175,000 - $195,000

About The Position

Steely is seeking a DSP Engineer to design and implement communications systems and signal-processing solutions. The role covers communications algorithms, mixed-signal requirements, FPGA architecture and HDL implementation, algorithm design and validation, and embedded software integration with FPGAs. Candidates must be able to hold and maintain a security clearance; U.S. citizenship is required. The anticipated annual salary range is $175,000–$195,000, with individual compensation determined by factors including skills, experience, education, certifications, location, and market data.

Requirements

At least 5 years of experience designing FPGA solutions.
Bachelor of Science in Electrical Engineering or a similar field.
Ability to hold and maintain a security clearance; U.S. citizenship is required.
Experience with embedded software development and interfacing with FPGAs in tightly coupled processor configurations, such as Zynq MPSoCs or RFSoCs.
Experience programming and controlling hardware peripherals for digital and analog devices.
Experience with FPGA build scripts using TCL or Make within virtualized environments such as Docker.

Nice To Haves

Master’s degree.

Responsibilities

Design communications systems and associated algorithms, including RF filters, signal modulation and demodulation, channel equalization and estimation, forward error correction, RF signal acquisition and recovery, automatic frequency control, and automatic gain control.
Address mixed-signal requirements, including quantization and fixed-point algorithm implementations.
Use MATLAB, Python, or X-MIDAS for algorithm design, validation, and test-vector generation.
Use Vivado design and simulation tools for FPGA architecture design and HDL implementation of signal-processing algorithms.
Develop embedded software and interface with FPGAs in tightly coupled processor configurations.
Program and control hardware peripherals for digital and analog devices.
Create FPGA build scripts using TCL and Make within virtualized environments such as Docker.