Dry Etch Process Develop Engineer
About The Position
Micron Technology’s Technology Development organization develops manufacturable technologies for next-generation memory devices. The Dry Etch Process Engineer builds, integrates, and optimizes plasma etch processes, working hands-on with etch equipment, chamber hardware, consumables, and metrology. The role uses data-driven methods to improve critical dimension control, profile, selectivity, uniformity, and defect performance, and collaborates with integration, lithography, thin films, CMP, device, manufacturing, and equipment supplier teams to mature processes from R&D into high-volume manufacturing. This is a full-time role at Micron’s NYC site in Albany, New York. The engineer works closely with the EUV Photo Lithography process team in NYC and collaborates with Technology Development teams in Boise, USA, and Hiroshima, Japan. The role also offers opportunities to work with suppliers and other companies while protecting Micron’s intellectual property. It supports the design and deployment of AI-enabled solutions to improve efficiency and decision-making.
Requirements
- M.S. or Ph.D. in Electrical Engineering, Materials Science, Physics, Chemistry, Chemical Engineering, Mechanical Engineering, or a related engineering or technical field relevant to plasma processing and semiconductor manufacturing; alternatively, a B.S. with 3+ years of semiconductor processing experience emphasizing dry etch/plasma etch.
- Experience in semiconductor process development or sustaining engineering, including DOE planning and execution and statistical data analysis.
- Working knowledge of plasma etch fundamentals, chamber hardware, and process characterization, including profile, CD, selectivity, uniformity, and defectivity.
- Ability to collaborate effectively across multifunctional technical teams and communicate results clearly.
- AI proficiency or AI-enabled ways of working.
Nice To Haves
- Hands-on experience with sophisticated dry etch platforms, such as ICP/RIE, and chamber matching across fleets.
- Familiarity with pattern transfer challenges such as ARDE, microloading, footing/notching, and integration with lithography/hardmask stacks.
- Experience with defect characterization techniques and tool health monitoring methodologies.
- Experience working with semiconductor equipment vendors, joint development programs, or R&D environments.
- Familiarity with technology transfer to high-volume manufacturing and sustaining support in a fab environment.
Responsibilities
- Develop, qualify, and sustain dry etch (plasma) unit processes for sophisticated memory technologies, including dielectric, conductor, and hardmask etch.
- Optimize critical process metrics, including CD control, etch profile and anisotropy, selectivity, microloading, uniformity, and line-edge/line-width roughness.
- Drive defect reduction and yield improvement using inline and out-of-line metrology, DOEs, SPC, and statistical data analysis.
- Perform root-cause analysis and implement corrective actions for process excursions, tool health issues, and integration-related failures.
- Partner with equipment vendors on chamber matching, hardware and recipe development, new capability evaluations, and cost-of-ownership improvements.
- Document process baselines, change controls, and learning; communicate results and support technology transition to large-scale production.
- Collaborate with cross-functional teams and contribute to AI-enabled solutions that improve efficiency and decision-making.
Benefits
- Medical, dental, and vision plans.
- Income-protection benefit programs in case of illness or injury.
- Paid family leave.
- Paid time off.
- Paid holidays.
- Additional compensation may include bonuses and equity.
