Digital and Mixed Signal IC Design/DV Engineer

Texas Instruments•Tucson, AZ

2h•Onsite

About The Position

We are seeking a highly motivated and versatile engineer to join our dynamic Current Sensing product line that develops cutting edge Shunt and Hall based mixed signal current sensing ICs. As a key member of our team, you will play a vital role in all phases of IC development, from architectural development, design, DV, tapeout and bring-up. This position offers a unique opportunity to develop expertise in both digital and mixed-signal domains.

Requirements

RTL design
synthesis
place and route
scan pattern generation
timing analysis
mixed-signal IC verification methodologies
testbench creation
automation using DMS and AMS stimulus and checkers
comprehensive test plans, tests, and simulations at RTL and gate levels
SystemVerilog (SV)
VHDL
UVM environments
Design for Verification (DFV) architectures
triage and resolve bugs
ensure first-pass silicon success
verification coverage
DV strategy, tools, scripts and methodologies

Responsibilities

Contribute to the full IC development lifecycle, including RTL design, synthesis, place and route, scan pattern generation, and timing analysis.
Develop and implement robust, scalable verification methodologies for mixed-signal ICs, including testbench creation and automation using DMS and AMS stimulus and checkers.
Create comprehensive test plans, tests, and simulations at RTL and gate levels using SystemVerilog (SV), VHDL, and the UVM environments.
Work closely with design and system teams to define Design for Verification (DFV) architectures, triage and resolve bugs, and ensure first-pass silicon success.
Drive verification coverage to meet defined goals, track progress, and communicate status, issues, and risks effectively.
Develop and contribute to the evolution of our DV strategy, tools, scripts and methodologies to improve quality, efficiency and automation.