Digital Mixed-Signal Modeling Engineer

Apple•Beaverton, OR
•Onsite

About The Position

Apple’s wireless silicon development team is seeking an engineer to join its modeling and verification team. The role focuses on modeling and verifying Analog/RF/Mixed-Signal blocks and SoCs using SystemVerilog, including developing behavioral models, testbenches, checkers, and tests. The engineer will create and execute test plans to meet project schedules and quality requirements, and collaborate with teams across the company. As part of the digital mixed-signal modeling team, the engineer will develop behavioral models for wireless SoC verification and help integrate mixed-signal models onto emulation platforms. The work supports multiple pre-silicon validation teams in achieving functional first silicon. The role is based at Apple headquarters in Cupertino, California.

Requirements

  • Bachelor’s degree and a minimum of 10 years of relevant industry experience; alternatively, a Master’s or Ph.D. with 5 or more years of experience in analog/RF circuit modeling.
  • Hands-on experience in Mixed-Signal Verification and Real Numbered Modeling of Mixed-Signal Systems.
  • Knowledge of wireless technologies such as WiFi, Bluetooth, or UWB, or radio systems generally.
  • Knowledge of basic analog circuits, including PLLs, LDOs, bandgaps, and ADCs/DACs.
  • Excellent communication and problem-solving skills.
  • Self-motivated individual contributor with a strong commitment to the team’s success.

Nice To Haves

  • Good understanding of emulation technologies and mixed-signal modeling requirements for synthesis-ready models.
  • Experience modeling with SystemC and/or C/C++.
  • Experience writing scripts in languages such as Perl or Python.
  • Knowledge of signal processing using Python or Matlab.
  • Good understanding of AMS and wireless circuits and systems.
  • Experience with SystemC modeling and high-level synthesis.

Responsibilities

  • Develop accurate, simulation-efficient analog behavioral models for Analog/RF blocks in SystemVerilog.
  • Build and reuse monitors and checkers for RF, Mixed-Signal, and Digital blocks.
  • Debug failures and resolve testbench, model, and checker issues; manage bug tracking.
  • Write scripts to automate workflows and improve Mixed-Signal verification methodology.
  • Develop models that are ready for emulation.
  • Build and execute test plans to meet project schedules and quality requirements.
  • Support pre-silicon validation teams in verifying wireless SoCs and achieving functional first silicon.
  • Help integrate mixed-signal models onto emulation platforms.
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