Device Reliability Engineer

Avicena Tech•Sunnyvale, CA

About The Position

As a Device Reliability Engineer at Avicena, you will own the reliability and qualification strategy for our GaN microLED and photodetector devices powering the LightBundle™ interconnect platform. You will design accelerated stress tests, build lifetime and degradation models, and define the qualification criteria that ensure our devices meet demanding data-center and AI-infrastructure lifetime targets.

Requirements

MS or PhD in Electrical Engineering, Materials Science, Physics, or a related field (or BS with equivalent industry experience).
5–8+ years in device or product reliability engineering for semiconductor or optoelectronic devices.
Strong command of accelerated life testing, statistical lifetime modeling, and acceleration-factor/failure-rate analysis.
Familiarity with reliability qualification standards and methodologies (JEDEC, Telcordia, or equivalent).
Solid understanding of degradation and wear-out mechanisms in semiconductor/optoelectronic devices.
Proficiency in statistical analysis and scripting (e.g., Python, MATLAB, JMP) and clear technical reporting.
Applicants must be authorized to work in the United States.

Nice To Haves

Prior experience with GaN-based microLED or LED/laser reliability is strongly preferred but not required.
Experience qualifying high-density emitter or detector arrays.
Familiarity with packaging, hybrid-bonding, and heterogeneous-integration reliability.
Experience defining reliability requirements for data-center, optical-module, or high-reliability applications.
Track record building reliability test infrastructure from the ground up in a startup or early-product environment.

Responsibilities

Define and own device-level reliability roadmaps, specification, qualification test plans (QTP), and acceptance criteria for GaN microLEDs and photodetector arrays.
Design and execute accelerated life tests and stress conditions (temperature, current density, humidity, thermal cycling, ESD) and build the associated test hardware/methodology.
Develop degradation and lifetime models (e.g., Arrhenius, acceleration factors, Weibull/lognormal statistics) and project field lifetime from accelerated data.
Identify and characterize wear-out and degradation mechanisms; partner with Failure Analysis to root-cause reliability fallout and validate fixes.
Drive device qualification against internal and industry standards (e.g., JEDEC/Telcordia-style methodologies) and prepare qualification reports for internal and customer use.
Feed reliability learnings back into device design, process, and packaging to improve robustness and margin; contribute to DfR (Design for Reliability) reviews.