Design Verification

Apple•Cupertino, CA

3d•$174,149 - $225,300

About The Position

Apple Inc. has a Design Verification position available in Cupertino, California, and various unanticipated locations throughout the USA. The role ensures the quality of an SC, IP, or subsystem by reviewing design and architecture specifications and working closely with micro-architecture teams. The successful candidate understands the design's functional and performance goals and uses this knowledge to develop effective verification strategies. Responsibilities include developing test plans, tests, coverage plans, and verification methodology test benches for next-generation Apple products. The role collaborates with design, architecture, and software teams to understand use cases and corner conditions and to drive test cases. It also involves running and triaging regressions, tracking bugs, analyzing coverage, investigating test failures using signal-tracing tools such as Verdi, and collaborating with design teams to resolve issues. The employee takes ownership of individual tasks and deliverables and aligns them with project goals and timelines. The position is 40 hours per week. The base pay range is $174,149–$225,300 per year, depending on skills, qualifications, experience, and location. Apple employees may be eligible for discretionary restricted stock unit awards and may purchase Apple stock at a discount through the Employee Stock Purchase Plan. Benefits include comprehensive medical and dental coverage, retirement benefits, discounted products, free services, and reimbursement for certain education expenses, including tuition. The role might also be eligible for discretionary bonuses or commission payments and relocation.

Requirements

Master's degree or foreign equivalent in Electrical and Computer Engineering or a related field.
Experience or education utilizing Verilog to code test benches that verify the functionality and performance of digital hardware designs.
Experience or education using Verilog to understand and debug digital designs and write Verilog test-bench wrappers and components.
Experience or education developing design verification test benches to understand digital design specifications and develop and verify design functionality.
Experience or education using Python as a scripting language for stimulus and test creation, regression analysis, and coverage collection.
Experience or education using Python for automation.
Experience or education in computer architecture, including system-level understanding of hardware functionality.
Experience or education using C++ to create and debug behavioral reference models for verifying RTL functionality.
Experience or education running regressions, managing bug tracking, and analyzing design performance.

Responsibilities

Ensure the quality of an SC, IP, or subsystem.
Review design and architecture specifications and work closely with micro-architecture teams.
Understand functional and performance goals and use that knowledge to test effectively.
Develop test plans, tests, and coverage plans, and define next-generation verification methodology test benches.
Collaborate with design, architecture, and software teams to understand use cases and corner conditions and drive test cases.
Run and triage regressions, track bugs, and analyze coverage.
Analyze test failures, trace signals using tools such as Verdi, and collaborate with the design team to address issues.
Take ownership of individual tasks and deliverables, ensuring alignment with project goals and timelines.

Benefits

Comprehensive medical coverage
Dental coverage
Retirement benefits
Discounted products
Free services
Reimbursement for certain education expenses, including tuition
Opportunity to participate in discretionary restricted stock unit awards
Opportunity to purchase Apple stock at a discount through the Employee Stock Purchase Plan
Possible eligibility for discretionary bonuses or commission payments
Possible relocation assistance