Design Verification

Apple • Austin, TX

3d

About The Position

Apple Inc. is hiring for a Design Verification role in Austin, Texas. The position creates software to verify the architecture and functionality of pre-silicon hardware designs. The work includes programming in object-oriented programming, C, C++, System Verilog, Python, and Perl; running regressions; tracking bugs; analyzing code and functional coverage; and simulating and debugging Register Transfer Level (RTL). The role collaborates across fields in a vertical product model to ensure the quality of a SoC, IP, or subsystem.

The position reviews design and architecture specifications and works closely with design and micro-architecture teams. It develops test plans, tests, and coverage plans, and defines next-generation verification methodologies and testbenches. The role also works with design, architecture, and software teams to understand use cases and corner conditions and drive test cases.

Work may focus on one or more of the following IP areas: Neural Engine hardware; DRAM subsystem and memory controller logic; encode and decode systems for ProRes and other codec formats such as VP9 and AV1; hardware security, including cryptographic algorithm implementations; high-speed standards such as PCI Express, DisplayPort, and MIPI; power management and fabric infrastructure; memory cache management; Display Subsystem; and Debug Subsystem for a variety of panels and products. The schedule is 40 hours per week.

Requirements

• Master's degree or foreign equivalent in Electrical Engineering, Computer Engineering, Electrical and Computer Engineering, or a related field.
• Five years of experience in the job offered or a related occupation.
• Use computer architecture knowledge to understand the micro-architecture of various design blocks.
• Use System Verilog/UVM to develop testbench code and test sequences for verifying design blocks.
• Use Python or Perl for scripting to create design verification collateral.
• Use NCSIM and Xcelium for waveform debugging to understand and triage regression failures.
• Write assertions to verify RTL for corner-case scenarios.
• Use digital design knowledge to understand subsystem design architecture.
• Use functional coverage and code coverage to identify coverage holes in design verification of IP blocks.

Responsibilities

• Create software to verify the architecture and functionality of pre-silicon hardware designs.
• Program using object-oriented programming, C, C++, System Verilog, Python, and Perl.
• Run regressions, track bugs, and analyze code and functional coverage.
• Simulate and debug Register Transfer Level (RTL).
• Collaborate across fields in a vertical product model to ensure the quality of a SoC, IP, or subsystem.
• Review design and architecture specifications and work closely with design and micro-architecture teams.
• Develop test plans, tests, and coverage plans, and define next-generation verification methodologies and testbenches.
• Collaborate with design, architecture, and software teams to understand use cases and corner conditions and drive test cases.
• Work on one or more of the listed IP areas.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior