Design Verification

Apple•Cupertino, CA

2d•Hybrid

About The Position

Apple is seeking a Design Verification engineer to join their team. This role involves designing and architecting specifications, working closely with design and micro-architecture teams, and understanding the functional and performance goals of the design. The engineer will develop test plans, tests, and coverage plans, and define the next generation verification methodology and test benches. Collaboration with design, architecture, and software teams is crucial to understand use cases and corner conditions, and to drive test cases. The role ensures the quality of the SoC, IP, and/or subsystem by working on various IPs such as Neural Engine hardware, DRAM subsystems, memory controller logic, Encode and Decode systems for ProRes and other codec formats, hardware security, high-speed IO standards, power management and fabric infrastructure, memory cache management, and display subsystems.

Requirements

Utilizing SystemVerilog and UVM methodology to implement scalable and reusable verification environment and test cases to verify designs
Utilizing VCS, xcelium or modelSim tools to run RTL, gate, and power aware simulations
Utilizing formal verification tools (JasperGold) for connectivity, assertion based functional and unreachability formal analysis
Utilizing coverage tools (Mentor InFact, Cadence vManager/IMC) for code and functional coverage analysis and closure
Applying C and/or C++ functional and performance models in verification
Applying knowledge in computer architecture and digital design in failure analysis and hardware debug
Utilizing waveform debug tools (Indago and Verdi) to triage and debug functional and performance issues
Developing and conducting test plans and test attributes based on design specifications
Experience in scripting languages PERL, tcl, and python for aiding verification
Using version control tools Perforce, Git, and Clearcase for source code control

Responsibilities

Design and architect specifications
Work closely with design & micro-architecture teams
Understand the functional & performance goals of the design
Develop test plans, tests & coverage plans
Define our next generation verification methodology & test benches
Communicate and collaborate with design, architecture and software teams to understand the use cases and corner conditions and drive test cases
Ensure the quality of the SoC, IP, and/or subsystem by working on one or more types of IP such as Neural Engine hardware, DRAM subsystems, memory controller logic, Encode and Decode systems for ProRes and other codec formats (such as VP9 and AV1), hardware security including cryptographic algorithm implementations), high-speed IO standards (such as PCI Express, DisplayPort, MIPI), power management and fabric infrastructure, memory cache management, and display subsystems for variety of panels and products.