Design Verification Engineer | Sensing

Texas Instruments•Dallas, TX

About The Position

In this position, you will be working on advanced mixed-signal sensor circuits using state-of-the art process technology, as well as be involved in the digital and AMS verification of high-performance digital circuits interfacing to leading edge analog circuitry as part of an overall system.

Requirements

advanced mixed-signal sensor circuits
state-of-the art process technology
digital and AMS verification of high-performance digital circuits
SystemVerilog
chip-level testcases
Simulation
Testcase debug
Verification closure
behavioral models for the analog blocks
chip-level verification environment
regressions
DV closure activities
design and systems teams
Design for testability using ad-hoc, Full scan, IDDQ, VBOX, ATPG, BIST
documentation
reviews
verification flow improvement strategies
risk assessment

Responsibilities

Develop detailed Verification/Test plans using specifications to cover all the digital/analog functionality/features of a mixed-signal chip for our next generation designs.
Develop SystemVerilog chip-level testcases based on the verification plan.
Simulation, Testcase debug and Verification closure for the digital/analog functionality of Mixed-signal chips, at chip-level in digital and AMS environment.
Finding design bugs with break-the-design mindset and ensuring design is bug-free and robust.
Develop SystemVerilog based behavioral models for the analog blocks and integrate them in the chip-level verification environment.
Running regressions and DV closure activities.
Work closely with design and systems teams to review/close spec gaps and design bugs, as they arise.
Design for testability using ad-hoc, Full scan, IDDQ, VBOX, ATPG, BIST
Drive documentation, reviews and verification flow improvement strategies.
Be proactive in risk assessment and drive solutions to mitigate them.