Design Verification Engineer

Broadcom • San Jose, CA

2d • $121,900 - $195,000

About The Position

The ASIC Product Division at Broadcom, a leading supplier of state-of-the-art SoC and embedded IP, is looking for qualified individuals to work in SoC and IP development programs. The candidate will be joining a high performance design team responsible for state-of-the-art subsystem development to meet customer requirements.

Requirements

• A Bachelor’s Degree in Electrical and Electronic Engineering, Computer Science, or equivalent
• 8+ year’s relevant industry work experience.
• Experience in verifying designs at system level and block level.
• Fluent knowledge of RTL verification methodologies including System Verilog.
• Strong experience in ASIC design verification flows and DV methodologies
• Strong working knowledge of object oriented verification languages (OVM, UVM, etc.), C/C++, Perl, and scripting skills.
• Strong and independent design debugging capability.
• Strong verbal and written communication skills. Must be comfortable working in a team environment with verification team and design team members.
• Demonstrated ability to analyze and resolve complex verification trade-off scenarios.
• Highly productive individual contributor with a demonstrated technical capability in system and sub-block level verification
• Must have legal authorization to work in the US

Nice To Haves

• Experience with hardware design and debug, C++/SystemC and other programming languages are a strong plus.
• Experience working with Emulators and FPGA based prototyping is a plus.
• Familiarity with overall chip design methodologies and tools
• Knowledge of CPU, DDR, Bus Protocol, Network Protocol or DSP design preferred

Responsibilities

• Verification environment development using modern verification techniques (System Verilog and UVM)
• Designing verification components such as UVM agents, and behavioral models
• Implementing coverage and assertions using System Verilog
• Developing random and directed test cases against the specification
• Analyzing and debugging simulation failures, as well as analyzing coverage results

Benefits

• Discretionary annual bonus
• Competitive new hire equity grant
• Annual equity awards
• Medical plans
• Dental plans
• Vision plans
• 401(K) participation including company matching
• Employee Stock Purchase Program (ESPP)
• Employee Assistance Program (EAP)
• Company paid holidays
• Paid sick leave
• Vacation time
• Paid Family Leave
• Other leaves of absence

What This Job Offers

• Job Type: Full-time
• Career Level: Senior