CPU Implementation Engineer

Apple • Cupertino, CA

3d • $174,149 - $225,300

About The Position

APPLE INC is hiring a CPU Implementation Engineer in Cupertino, California and various unanticipated locations throughout the USA. The role works on block- and full-chip EM/IR and electrical verification, power-grid methodologies and implementation, and analysis and comparison of tool methodologies for power-grid construction. The engineer scripts in Perl and/or Python to automate tasks and improve debug efficiency, works with implementation and CAD teams throughout the full design cycle to drive analysis fixes and signoff closure for takeout, and collaborates with the SOC team to meet IP analysis technical and delivery requirements. The role also works on a complex C/C++ code base to optimize design for power-grid convergence. The position is 40 hours per week.

The stated base pay range is $174,149–$225,300 per year. Compensation may also include discretionary stock awards, employee stock purchase opportunities, discretionary bonuses or commission payments, and relocation, subject to eligibility and program terms. Benefits include medical and dental coverage, retirement benefits, discounted products and free services, and reimbursement for certain career-related educational expenses, including tuition.

Requirements

• Master’s degree or foreign equivalent in Electrical and Computer Engineering, Electrical Engineering, Electronics Engineering, or a related field.
• Experience and/or education working on algorithmically complex chip-design tasks using C or C++.
• Experience and/or education programming in Perl, Python, or TCL scripting languages.
• Experience and/or education using industry-standard CAD/EDA tools such as Cadence Virtuoso or Synopsys ICC/ICC2 Design Compiler for chip-design implementation tasks.
• Experience and/or education performing EMIR and power-grid analysis for industry designs using standard tools such as Cadence Voltus or Apache Redhawk.
• Experience and/or education reading and understanding Verilog RTL design descriptions.
• Experience and/or education implementing and operating static timing analysis tools such as Cadence Tempus or Synopsys PrimeTime.
• Experience and/or education using circuit analysis tools such as HSPICE.

Responsibilities

• Work on block- and full-chip EM/IR and electrical verification.
• Work on power-grid methodologies and implementation.
• Use Perl and/or Python scripts to automate tasks and improve debug efficiency.
• Collaborate with implementation and CAD teams throughout the full design cycle to drive analysis fixes and signoff closure for takeout.
• Analyze and compare tool methodologies to determine the best suited for power-grid construction.
• Work with the SOC team to meet IP analysis technical and delivery requirements.
• Work on a complex C/C++ code base to optimize design for power-grid convergence.

Benefits

• Comprehensive medical and dental coverage.
• Retirement benefits.
• Discounted products and free services.
• Reimbursement for certain educational expenses, including tuition, for formal education related to advancing a career at Apple.
• Opportunity to participate in discretionary employee stock programs, including restricted stock unit awards.
• Opportunity to purchase Apple stock at a discount through the Employee Stock Purchase Plan, if voluntarily participating.
• May be eligible for discretionary bonuses or commission payments.
• May be eligible for relocation.

What This Job Offers

• Job Type: Full-time