CAD Engineer – ASIC Design Flow

BLUE ORIGINSeattle, TX
$230,398 - $322,557

About The Position

At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight! Blue Origin is pioneering the future of space-based communications with TeraWave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This multi-orbit constellation will consist of optically interconnected satellites in low Earth orbit (LEO) and medium Earth orbit (MEO), providing enterprise-grade connectivity for critical operations worldwide. About the Role Blue Origin is pioneering the future of space-based communications with TeraWave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This multi-orbit constellation will consist of optically interconnected satellites in low Earth orbit (LEO) and medium Earth orbit (MEO), providing enterprise-grade connectivity for critical operations worldwide. We are seeking a CAD Engineer to support and maintain the design flow for our next-generation satellite communications ASIC development. The ideal candidate brings hands-on expertise in EDA tools and semiconductor design flows, thriving in a fast-paced environment where innovation meets mission-critical execution.

Requirements

  • B.S. degree in Electrical Engineering, Computer Science, or related field
  • 10+ years of experience in CAD/EDA engineering
  • Expertise with industry-standard EDA tools for digital design
  • Experience with PDK integration and validation
  • Strong scripting skills (Perl, Python, Tcl, or shell)
  • Experience with version control and build systems for hardware design

Nice To Haves

  • M.S. in relevant engineering discipline
  • Experience with advanced node technologies (7nm or below)
  • Knowledge of cloud-based EDA solutions
  • Experience with mixed-signal or RF design flows
  • Understanding of DevOps principles applied to hardware design

Responsibilities

  • Support and maintain the complete "RTL-to-GDSII" design flow for ASIC development
  • Assist in the selection, installation, and configuration of EDA tools across the design process
  • Develop and maintain design databases, PDKs, and reference flows
  • Create and improve automation scripts to enhance designer productivity
  • Support designers and verification engineers with CAD-related issues
  • Collaborate with foundry partners to integrate and validate PDKs
  • Maintain version control and data management systems for design collateral
  • Document CAD flows and provide training to engineering teams

Benefits

  • Medical, dental, vision, basic and supplemental life insurance, paid parental leave, short and long-term disability, 401(k) with a company match of up to 5%, and an Education Support Program.
  • Stock Options for all regular employees (working at least 20 hours/week)
  • Paid Time Off: Up to four (4) weeks per year based on weekly scheduled hours, and up to 14 company-paid holidays.
© 2026 Teal Labs, Inc
Privacy PolicyTerms of Service