ASIC Test Engineer
About The Position
The ASIC Test Engineer will drive qualification, reliability, and return-material-authorization (RMA) testing for Silicon One ASIC products using automated test equipment (ATE) platforms and silicon debug methods. The role works with Product Test Engineering, DFT, and Design Engineering teams to define ATE test strategies, qualification hardware requirements, and data analytics workflows that improve silicon quality and production readiness. The engineer performs silicon failure analysis and debugs system-level failures down to the flop or cell level, identifying root causes and supporting corrective actions. The role develops and enhances test coverage by defining patterns and parametric conditions, correlating ATE behavior with system failures, and transitioning validated solutions into volume manufacturing. It also analyzes qualification and reliability data to identify trends, improve test effectiveness, and strengthen product reliability.
Requirements
- Bachelor’s degree or higher in Electrical Engineering, Computer Engineering, or equivalent experience.
- 8+ years of experience in IC test engineering, SoC/VLSI test bring-up, characterization, and production testing.
- Experience with Advantest 93000 Smartscale and Exascale for test program development, silicon debug, and characterization.
- Hands-on experience debugging silicon failures and isolating issues to the flop or cell level.
- Proficiency in C, C++, Java, 93k test methods, and Python.
Nice To Haves
- Experience with IC component qualification and reliability failure modes.
- Working knowledge of data analysis tools such as JMP, statistical analysis methods, and AI/ML techniques for test data analytics.
- Hands-on experience analyzing component failures at the system level and performing fault isolation.
- Knowledge of electrical and physical failure analysis techniques.
- Strong problem-solving and cross-functional collaboration skills.
Responsibilities
- Drive qualification, reliability, and RMA testing activities for Silicon One ASIC products using ATE platforms and silicon debug methodologies.
- Partner with Product Test Engineering, DFT, and Design Engineering teams to define ATE test strategies, qualification hardware requirements, and data analytics workflows.
- Perform silicon failure analysis and debug system-level failures down to the flop or cell level to identify root causes and support corrective actions.
- Develop and enhance test coverage by defining new patterns and parametric conditions.
- Correlate ATE behavior to system failures and transition validated solutions into volume manufacturing.
- Analyze qualification and reliability data to identify trends, improve test effectiveness, and strengthen product reliability.
Benefits
- Medical insurance
- Dental insurance
- Vision insurance
- 401(k) plan with Cisco matching contribution
- Paid parental leave
- Short- and long-term disability coverage
- Basic life insurance
- Paid holidays
- Floating holiday for non-exempt employees
- Paid birthday day off
- Paid year-end holiday shutdown
- Personal wellness days
- Paid vacation or flexible vacation time off, depending on employee classification
- Sick time off
- Additional paid time away may be requested for critical or emergency family issues
- Optional paid volunteer days
- Annual bonuses for eligible non-sales roles
- Potential grants of Cisco restricted stock units
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What This Job Offers
Job Type
Full-time
Career Level
Senior
