ASIC/FPGA Design Engineer III

Lockheed Martin•Denver, CA

1d•Onsite

About The Position

Join Our Team as a ASIC/FPGA Design Engineer where you will work on the development of a sophisticated state-of-the-art avionics product in a world class Integrated Product Development environment. The Silicon Solutions team of Lockheed Martin Space is building the best ASIC/FPGA team in the world, and are seeking a highly talented and motivated ASIC & FPGA Design Engineer who has a passion for microchip design and space. You will be working at the Supplier site in Cambridge MA. Lockheed Martin is an equal opportunity employer. Qualified candidates will be considered without regard to legally protected characteristics. By applying to this job, you are expressing interest in this position and could be considered for other career opportunities where similar skills and requirements have been identified as a match. Should this match be identified you may be contacted for this and future openings. Lockheed Martin supports a variety of alternate work schedules that provide additional flexibility to our employees. Schedules range from standard 40 hours over a five day work week while others may be condensed. These condensed schedules provide employees with additional time away from the office and are in addition to our Paid Time off benefits. This position requires a government security clearance, you must be a US Citizen for consideration. At Lockheed Martin, we use our passion for purposeful innovation to help keep people safe and solve the world's most complex challenges. Our people are some of the greatest minds in the industry and truly make Lockheed Martin a great place to work. With our employees as our priority, we provide diverse career opportunities designed to propel, develop, and boost agility. Our flexible schedules, competitive pay, and comprehensive benefits enable our employees to live a healthy, fulfilling life at and outside of work. We place an emphasis on empowering our employees by fostering an inclusive environment built upon integrity and corporate responsibility. If this sounds like a culture you connect with, you’re invited to apply for this role. Or, if you are unsure whether your experience aligns with the requirements of this position, we encourage you to search on Lockheed Martin Jobs , and apply for roles that align with your qualifications.

Requirements

You need to be an independently minded and well organized engineer, comfortable in laboratory digital environments, and able to respond and interact with a dynamic fast-moving team.
3+ years professional FPGA development experience.
While no clearance is needed to start in this position, you will need to obtain and maintain a DoD Secret clearance , thus US Citizenship is required.
Bachelor of Science or higher from an accredited college in Electrical Engineering or related discipline, or equivalent experience/combined education.
Prior FPGA development experience.
HDL programming experience with VHDL, Verilog, and/or SystemVerilog.
Willing and able to obtain and maintain a DoD Secret clearance, thus US Citizenship is required for this position.

Nice To Haves

Masters Degree.
Experience in ASIC / FPGA life cycle (architecture, design, simulation, verification, validation, integration & test).
FPGA/ASIC verification experience is a plus.
Experience with electronics design
Experience in lab integration, and troubleshooting activities
Knowledge of space-grade/qualified FPGAs and ASICs and toolsets including AMD/Xilinx Vivado or Microchip Libero.
Experience or knowledge of MS Project, JIRA.
Experience with MS Project, JIRA or equivalent a plus.
Experience with Earned Value Management System (EVMS).
Experience mentoring junior engineers.

Responsibilities

Work with low SWaP, radiation hardened, space rated devices.
Perform all aspects of ASIC and FPGA development through the lifecycle from initial requirements capture through architecture, design, analysis, simulations and test in a Linux-based high-performance computing environment.
Support technical reviews and present to internal and external stakeholders.
Interface with an independent verification team who will be working in parallel, verifying the design.