Architecture Technical Manager - NVLink Fusion

NVIDIA•Westford, MA

1d•$272,000 - $431,250

About The Position

NVIDIA is hiring an Architecture Technical Manager to lead cross-disciplinary architecture efforts for next-generation NVLink Fusion hardware. The role focuses on developing chips and systems for the AI infrastructure market, understanding the product across subject areas, and helping define a unified product. It uses learnings from current projects to inform feature requirements and planning for future generations. The manager evaluates product features and their schedule and effort implications, manages feature creep, and reviews or proposes changes to chip architecture and microarchitecture. The role also guides verification requirements and test plans, coordinates verification across software and hardware teams, and drives product bring-up plans and execution. The manager coordinates productization requirements, including debug, root-cause analysis, and workarounds, and works with performance and power teams to balance product tradeoffs against customer expectations. Close collaboration with software, firmware, platform, and other cross-functional teams is required.

Requirements

Master's degree in Computer Engineering or Electrical Engineering, or equivalent experience.
15 years of proven experience.
Expertise in chip architecture.
Experience with industry-standard bus protocols.
Experience building high-performance chips.
Strong background in all aspects of chip development cycles.
Excellent interpersonal, communication, and teamwork skills.
Drive to continuously learn and expand architectural breadth and depth.
Excellent thinking and problem-solving skills.

Nice To Haves

Good understanding of LLMs.

Responsibilities

Work on NVLink Fusion chips and systems, understand them across subject areas, and help define a unified product.
Use learning from one project to drive feature requirements and planning for the next generation.
Evaluate product features and their schedule and effort implications, act as a gatekeeper for product features, and manage feature creep.
Review chip architecture and microarchitecture features and propose changes.
Guide verification requirements and test plans, and coordinate verification efforts across software and hardware teams.
Drive product bring-up plans and execution.
Coordinate productization requirements, including debug, root-cause analysis, and workarounds.
Collaborate with performance and power teams to make product tradeoffs that meet customer expectations.
Work with software, firmware, platform, and cross-functional teams on system architecture.