Analog and Mixed-Signal IC Design Engineer Intern
Neuralink
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Posted:
August 24, 2023
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Onsite
About the position
The job overview for this position is that the company is seeking Analog and Mixed-Signal IC Design Engineer Interns who will be responsible for designing and implementing innovative analog and mixed-signal chip architectures. The role involves circuit design, layout, verification, and running complex simulations and tests. The ideal candidates are individuals who are excited about building things, highly analytical, and enjoy solving new problems regularly. Preferred qualifications include skills in scripting and automation, experience in lab testing of high-precision ICs, and familiarity with advanced CMOS FinFET technologies.
Responsibilities
- Define and implement innovative and optimal analog and mixed signal circuit architectures and transistor-level circuit solutions
- Achieve challenging noise, mismatch, distortion, power consumption, and cost requirements
- Define verification plan for a portion of IP or chip and run complex simulations and analyses
- Design, program, and run complex tests and review tests of other team members
- Identify and analyze bugs and other issues
- Apply technical skills outside of the classroom through laboratory, research, extracurricular project teams, open source contributions, volunteering, personal projects, or prior internship/work experience
- Have skills in scripting and automation for complex simulation scenarios
- Conduct lab testing of high-precision analog and mixed-signal ICs
- Possess functional modeling experience and logic verification with Verilog AMS and SystemVerilog
- Have experience in design and layout with advanced CMOS FinFET technologies
- Familiarity with design for high-volume production
Requirements
- Minimum 1 years of experience in analog/mixed-signal integrated CMOS circuit design for a specific area (e.g., delta-sigma ADC, SAR ADC, DAC, VCO, PLL, DLL, Audio CODEC and Class D audio amplifier, high speed PHY & SERDES) with a successful track record of silicon validation.
- Minimum 3 months experience of application of technical skills outside of the classroom (examples: laboratory, research, extracurricular project teams, open source contributions, volunteering, personal projects or prior internship/work experience)
- Skills in scripting and automation for complex simulation scenarios.
- Experience in lab testing of high-precision analog and mixed-signal ICs.
- Functional modeling experience and logic verification with Verilog AMS and SystemVerilog.
- Experience in design and layout with advanced CMOS FinFET technologies.
- Experience with design for high-volume production.
Benefits
- An opportunity to change the world and work with some of the smartest and most talented experts from different fields.
- Growth potential. Rapid advancement for team members who have an outsized impact.
- Excellent medical, dental, and vision insurance through a PPO plan; parental leave.
- Flexible time off + paid holidays.
- Equity + 401(k) plan.
- Commuter Benefits.
- Meals provided.