About The Position

As a Qualcomm ASIC Engineer, you will define, model, design, optimize, verify, validate, implement, and document IP (block/SoC) development for high-performance, high-quality, low-power products. You will collaborate with cross-functional groups to determine product execution paths. In this role, you will work with a team to enable power management solutions for Qualcomm SoCs. You will help define and implement embedded firmware that manages operation of the Always ON subsystem and the distribution of allocated power and thermal budgets. You will also help characterize existing and new IPs. With a focus on limits management, you will work closely with hardware power management and firmware development teams, engage with third parties to enable new platforms, and provide input to SoC and platform architects on future designs.

Requirements

  • Bachelor's degree in Science, Engineering, or a related field and 4+ years of ASIC design, verification, validation, integration, or related work experience; OR a Master's degree in Science, Engineering, or a related field and 3+ years of related experience; OR a PhD in Science, Engineering, or a related field and 2+ years of related experience.
  • Ability to work independently with minimal supervision and provide supervision or guidance to other team members.
  • Ability to make significant decisions that affect work beyond the immediate work group.
  • Verbal and written communication skills to convey complex information; the role may require negotiation, influence, and tact.
  • Ability to plan, solve problems, and prioritize tasks without defined steps.

Nice To Haves

  • Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.
  • 6+ years of ASIC design, verification, validation, integration, or related work experience.
  • 2+ years of experience with architecture and design tools.
  • 2+ years of experience with scripting tools and programming languages.
  • 2+ years of experience with design verification methods.
  • 1+ year of work experience in a role requiring interaction with senior leadership, such as Director level and above.

Responsibilities

  • Define, model, design, optimize, verify, validate, implement, and document IP (block/SoC) development for high-performance, high-quality, low-power products.
  • Help define and implement embedded firmware to manage operation of the Always ON subsystem and the distribution of allocated power and thermal budgets.
  • Help characterize existing and new IPs.
  • Create architectures, circuit specifications, logic designs, and/or system simulations based on system-level requirements.
  • Collaborate across functional teams to develop and execute implementation strategies that meet system requirements and customer needs.
  • Evaluate complex process flows from high-level design through synthesis, place and route, timing and power use, and verification, or comparable custom circuit design and layout flows.
  • Use tools and applications such as RTL-to-GDS flow and Virtuoso to enable advanced architecture and design of complex blocks, SoCs, or IC packages.
  • Write and review detailed technical documentation for complex EDA/IP/ASIC projects.
  • Work closely with hardware power management and firmware development teams, engage with third parties on new platform enablement, and provide input to SoC and platform architects on future designs.

Benefits

  • Competitive annual discretionary bonus program.
  • Opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for the annual bonus).
  • Competitive benefits package designed to support employees at work, at home, and at play.
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