Firmware Architect & Subsystem Technical Leader, Acacia

Cisco•Maynard, MA
•$192,400 - $275,800•Hybrid

About The Position

Acacia, part of Cisco, is a market leader in coherent optical transceivers and pluggable optical interconnects. Its solutions serve hyperscale cloud providers and telecommunications networks, connecting data centers across metropolitan, terrestrial, and submarine fiber links. Acacia is also expanding into data center fabrics and high-performance computing clusters, and develops optical communication technologies including PAM4 DSP platforms. The Embedded Software Engineering Technical Leader serves as a principal firmware architect, guiding embedded CPU software architecture used to configure, manage, and optimize Acacia transceiver subsystems and future system-on-chip architectures. The role leads the architecture, design, and implementation of reliable, low-latency firmware for multicore microcontrollers; partners with ASIC, DSP, optical, and hardware architects on hardware/software interfaces and subsystem configuration; and architects control-plane firmware, BSPs, drivers, and real-time state machines for bare-metal and RTOS platforms. The leader establishes firmware engineering standards, mentors engineers, and aligns teams on system modeling and low-level implementation. The position is 100% onsite in Maynard, Massachusetts during the initial one-year onboarding period, with hybrid flexibility available afterward.

Requirements

  • Bachelor’s degree in Electrical Engineering, Electronics Engineering, Computer Engineering, Computer Science, or a related field, and 12+ years of professional experience.
  • 10+ years of low-level embedded C and C++ programming for resource-constrained hardware environments.
  • 8+ years architecting and developing real-time embedded firmware on bare-metal systems and RTOS platforms such as VxWorks, FreeRTOS, or ThreadX.
  • Experience developing firmware for ARM processors or microcontrollers, such as Cortex-M or Cortex-R, including BSPs, device drivers, and hardware peripheral interfaces such as I2C, SPI, UART, and MDIO.
  • Ability to work 100% onsite in Maynard, MA during the initial one-year onboarding period; hybrid flexibility is available afterward.

Nice To Haves

  • Firmware architecture experience for optical transceivers, high-speed mixed-signal ICs, photonics, or telecommunications transmission hardware.
  • Experience developing control-plane software, state machines, and multiprocessor or multithreaded communication protocols.
  • Experience successfully leading firmware engineering projects and collaborating across ASIC design, DSP modeling, Hardware, and SQA teams.
  • Proficiency with version control and CI/CD tools such as Git, Jira, and Perforce, and automation scripting with Python or Shell.
  • Experience in semiconductor or hardware environments, or engagement with optical industry standards bodies such as OIF or IEEE.

Responsibilities

  • Lead end-to-end architecture, design, and implementation of high-reliability, low-latency embedded firmware for multicore ARM Cortex-R and Cortex-M microcontrollers.
  • Partner with ASIC, DSP, Optical, and Hardware Engineering architects to co-design hardware/software interfaces, configure optical subsystems, and resolve hardware-software boundary challenges.
  • Architect multithreaded control-plane firmware, Board Support Packages, device drivers, and real-time state machines on bare-metal and RTOS platforms.
  • Establish firmware engineering standards.
  • Mentor senior and intermediate engineers across the software organization.
  • Drive multifunctional alignment from high-level system modeling through low-level register- and bit-level implementation.
  • Provide technical direction and intermediate leadership runway to support the growth of the engineering presence in the community.

Benefits

  • Medical insurance
  • Dental insurance
  • Vision insurance
  • 401(k) plan with Cisco matching contribution
  • Paid parental leave
  • Short- and long-term disability coverage
  • Basic life insurance
  • Cisco restricted stock unit grants may be available, subject to continued employment and vesting terms
  • 10 paid holidays per full calendar year
  • One floating holiday for non-exempt employees
  • Paid birthday day off
  • Paid year-end holiday shutdown
  • Four paid personal wellness days
  • Non-exempt employees receive 16 days of paid vacation per full calendar year, accrued for full-time employees
  • Exempt employees participate in a flexible vacation time off program with no defined limit, subject to availability and business limitations
  • 80 hours of sick time off provided on hire and each January 1, with up to 80 unused hours carried forward
  • Additional paid time away may be requested for critical or emergency family issues
  • Optional 10 paid volunteer days per full calendar year
  • Non-sales employees may be eligible for annual bonuses, subject to Cisco policies
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