Advanced Packaging Technology & Integration Leader

Applied Materials•Santa Clara, CA

7d•$200,000 - $275,000

About The Position

Applied Materials is seeking an Advanced Packaging Technology & Integration Leader to lead development of next-generation semiconductor packaging and 3D integration technologies. The role combines deep technical expertise, first-principles problem solving, semiconductor process integration, and technical leadership. The successful candidate will develop new technologies by examining the fundamental physics, materials, interfaces, processes, and integration constraints—not merely optimizing established process flows. The position requires expertise across hybrid bonding, through-silicon vias (TSVs), advanced thermal materials and management, interposers, bridge-die technologies, and heterogeneous integration. The leader will guide cross-functional teams spanning materials, unit-process development, integration, device and package architecture, modeling, characterization, equipment, and manufacturing. The position is based in Santa Clara, California, and includes travel of 10% of the time. Relocation is available for eligible candidates.

Requirements

Advanced degree in Materials Science, Chemical Engineering, Electrical Engineering, Mechanical Engineering, Applied Physics, or a closely related discipline preferred, or equivalent demonstrated semiconductor technology-development expertise.
Demonstrated experience developing semiconductor technologies or integration schemes from early concept through experimental validation.
Deep understanding of semiconductor process integration.
Strong expertise in several of the following areas and broad understanding across the remainder: hybrid bonding; TSV technology; 2.5D/3D integration; interposers; bridge die; chiplet integration; thermal-management materials; thin-wafer processing; wafer/die bonding; advanced metallization; CMP and surface preparation; mechanical stress and wafer warpage; semiconductor/package reliability.
Ability to reason from fundamental physics and materials behavior when established solutions are insufficient.
Demonstrated ability to define experiments that distinguish between competing physical mechanisms and accelerate technical learning.
Strong record of leading complex, multidisciplinary semiconductor technology-development programs.
Demonstrated ability to mentor technical teams and influence organizations beyond direct reporting relationships.
Excellent written and verbal communication skills, including the ability to communicate effectively in detailed engineering reviews and executive-level technology strategy discussions.

Nice To Haves

Experience developing technology for AI/HPC, HBM, chiplets, logic-memory integration, or other high-performance heterogeneous systems.
Experience working across the semiconductor ecosystem, including device manufacturers, foundries, OSATs, equipment companies, material suppliers, or research organizations.
Experience translating future device/package architectures into semiconductor process and equipment requirements.
Track record of technical innovation demonstrated through patents, publications, technology transfers, or successful product/process introductions.
Strong understanding of interactions among electrical performance, power delivery, thermal management, mechanical integrity, manufacturability, cost, and yield.
Experience moving technology from pathfinding/R&D into product development or manufacturing.

Responsibilities

Develop differentiated semiconductor packaging technologies from first principles, translating understanding of materials, interfaces, mechanics, thermal behavior, electrical performance, and process physics into practical solutions.
Identify limitations in future AI/HPC, memory, and heterogeneous-integration architectures and develop approaches to address them.
Convert early concepts into experimentally testable structures, integration flows, and technology demonstrations.
Establish technology roadmaps connecting future device and package requirements to materials, processes, equipment capabilities, and integration schemes.
Evaluate competing technical approaches and recommend solutions based on fundamental engineering trade-offs.
Provide technical leadership in hybrid bonding, TSVs, 2.5D and 3D integration, interposers, bridge-die architectures, chiplets, heterogeneous integration, advanced redistribution and high-density interconnects, thermal management, and thermal-mechanical reliability.
Develop complete process-integration strategies and understand interactions among deposition, etch, CMP, cleans, bonding, lithography, metallization, wafer thinning, and packaging operations.
Define integration experiments and learning cycles to identify root causes and fundamental process limitations.
Assess trade-offs involving thermal budget, contamination, stress, topology, alignment, electrical performance, yield, and reliability across process modules.
Drive technology from concept through proof of principle and integrated demonstration toward a manufacturable solution.
Lead multidisciplinary teams of process and integration engineers, materials scientists, modeling and equipment engineers, and external collaborators.
Set technical direction, mentor senior technical staff, and develop future technical leaders.
Foster an environment where hypotheses are challenged through physics, modeling, data, and experimentation.
Lead technical reviews and communicate complex technical issues to engineering teams and senior executives.
Engage with logic, memory, foundry, OSAT, and AI/HPC customers to understand future integration challenges.
Translate customer architecture and scaling requirements into technology-development programs.
Collaborate with universities, research organizations, material suppliers, equipment partners, and ecosystem companies as appropriate.
Represent the organization as a technical authority in advanced packaging and heterogeneous integration.