Verification Engineer 4

TekWissen•San Jose, CA
•Onsite

About The Position

Participate in the functional verification of blocks of complex ASICs and/or IP cores for a combined CPU/GPU development effort. Work as part of a design and verification team, collaborating with team members to understand and verify design functionality within the context of the block, chip, and overall system. Document and execute test plans comprising directed and constrained-random tests for simulation. Adopt evolving industry verification methodologies to verify increasingly complex SoC designs within market-driven schedules, and work within the existing verification infrastructure on active projects. The role also involves familiarity with hardware modeling and/or assertion-based verification methods.

Requirements

  • 8–10 years of verification experience on large ASIC development projects, or software/firmware experience in a hardware development setting.
  • Strong background in C/C++ development in a Linux environment.
  • Strong debugging skills and experience with tools such as Gdb and Valgrind.
  • Proficiency in object-oriented programming, STL, computer architecture, and data structures.
  • Knowledge of Perl and Makefiles.
  • Strong analytical skills and attention to detail.
  • Excellent written and communication skills.

Nice To Haves

  • Experience in Verilog, SystemVerilog, or SystemC.
  • Experience in a C/Verilog environment using DPI/PLI.

Responsibilities

  • Participate in the functional verification of blocks of complex ASICs and/or IP cores for a combined CPU/GPU development effort.
  • Collaborate with design and verification engineers to understand and verify design functionality in the context of the block, chip, and overall system.
  • Document and execute test plans consisting of directed and constrained-random tests for simulation.
  • Adopt evolving industry verification methodologies for increasingly complex SoC designs within aggressive, market-driven schedules.
  • Work within the existing verification infrastructure on active projects.
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