Technical Staff Engineer - AMS Verification

Microchip Technology Inc.•Chandler, AZ

6d•Onsite

About The Position

Microchip Technology Inc. is seeking a Technical Staff Engineer specializing in Analog Mixed-Signal (AMS) verification and Power Integrity (PI/SI) for their next-generation System-on-Chips (SoCs) and chiplet-based platforms. This role involves integrating analog IP in mature process nodes with advanced digital nodes (e.g., 12nm and beyond). The company emphasizes a culture of trust, empowerment, respect, diversity, and communication, offering opportunities for growth and stability within a global organization. Microchip is recognized for its commitment to employee development, values-based decision-making, and community, supported by its Leadership Passage Programs. The company has a history of record revenue and consistent profitability, driven by a dedicated team focused on innovation.

Requirements

Bachelor’s/Master’s degree in electrical engineering or equivalent with 14+ years of experience
Proven experience in AMS verification for advanced SoCs, including exposure to 12nm nodes or beyond
Solid understanding of cross-domain interactions and multi-voltage/power domains
Hands-on experience with industry-standard tools: Cadence (Virtuoso, Spectre, AMS Designer) Questa ADMS / Symphony HSPICE or equivalent
Experience in silicon debug and correlation of simulation results with silicon behavior
Ability to analyze and interpret chip-level electrical specifications and IO requirements
Strong communication skills with the ability to work effectively in a global, cross-functional environment

Nice To Haves

Experience with chiplet architectures or multi-die system integration
Exposure to die-to-die interfaces and advanced node (12nm and beyond) integration challenges
Experience in circuit-level debug and modeling

Responsibilities

Lead/contribute to sub-system and chip-level AMS and SPICE simulations for complex SoCs and multi-die (chiplet) architectures
Drive AMS verification across chiplet boundaries, including cross-node integration (mature analog + 12nm digital)
Collaborate closely with SoC design, architecture, analog, and advanced-node digital implementation teams
Review and understand SoC specifications, IO subsystems, and die-to-die interface requirements
Plan and execute AMS/SPICE simulation strategies, including full-chip and chiplet-level verification
Perform PI/SI simulations covering: Die pad ring, Package and interposer (chiplet-based designs), PCB interfaces (as applicable)
Analyze power integrity and signal integrity across chiplet interfaces and multiple power domains
Develop and enhance AMS and PI/SI methodologies and flows for multi-die/chiplet systems
Partner with validation teams on silicon bring-up, debug, and simulation-to-silicon correlation