TD Memory Quality and Reliability PhD Intern
About The Position
The Technology Development (TD) Quality and Reliability organization enables deployment of next-generation semiconductor technologies through silicon-based quality, reliability, and technology readiness assessments. The Memory Quality and Reliability team works with Design, Device Engineering, Product Development Engineering, and Yield organizations to develop, characterize, and certify SRAM, Register File (RF), and Fuse technologies for advanced process nodes. It supports technology certification and PDK release milestones through memory characterization, silicon data analysis, predictive modeling, and risk assessment. The TD Memory Quality and Reliability Intern will collaborate with experienced engineers to evaluate advanced memory technologies and support technology readiness for future Intel Foundry process nodes. The role involves hands-on work in memory characterization, silicon data analytics, statistical modeling, and semiconductor technology development. The intern will analyze silicon data, develop predictive models, and assess memory performance across operating conditions to support technology certification decisions.
Requirements
- Currently pursuing a Ph.D. in Electrical Engineering or a related field.
- Basic knowledge of semiconductor devices, microelectronics, or integrated circuit design.
- Programming or scripting experience using Python or similar languages.
- Experience analyzing technical, scientific, or research data through academic projects, research activities, or previous internships.
- Cumulative GPA of 3.0 or higher.
Nice To Haves
- Coursework, research, or experience in SRAM or memory technologies.
- Coursework, research, or experience in semiconductor device physics.
- Coursework, research, or experience in VLSI design.
- Coursework, research, or experience in statistics, machine learning, or data science.
- Coursework, research, or experience in semiconductor process technology.
- Experience with Python, Pandas, and NumPy.
- Experience with JMP or other statistical analysis tools.
- Experience with data visualization and statistical modeling techniques.
- Experience with large-scale data analysis and predictive modeling.
- Experience in memory architectures, silicon characterization, reliability assessment, or semiconductor test methodologies.
Responsibilities
- Analyze silicon characterization data from SRAM, Register File (RF), and Fuse memory test structures to identify performance trends, variability, and potential risks.
- Support memory characterization across voltage, temperature, and process conditions.
- Perform data analysis, visualization, and reporting using Python, JMP, or similar analytical tools.
- Develop and enhance statistical models for Vmin/Vmax prediction and technology readiness assessments.
- Support Silicon-to-Simulation (Sil2Sim) correlation studies and memory characterization methodologies.
- Generate technical reports and contribute to technology certification reviews.
- Collaborate with Design, Device Engineering, Process Integration, Product Development Engineering, and Yield Engineering teams.
- Assist with risk assessment activities and technology certification milestones.
- Present data-driven findings and recommendations to engineering teams and project stakeholders.
Benefits
- Competitive pay
- Stock bonuses
- Health benefits
- Retirement benefits
- Vacation
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What This Job Offers
Job Type
Full-time
Career Level
Intern
Education Level
Ph.D. or professional degree
